Datasheet

DAC8234
www.ti.com ........................................................................................................................................... SBAS464A – AUGUST 2009 – REVISED SEPTEMBER 2009
Monitor Register. Default = 0000h.
The Monitor Register selects one of the four DAC outputs or the external signal AIN that is to be monitored
through the V
MON
pin. Only one bit can be set to '1' at a time. When all bits = '0', the monitor is disabled and
V
MON
is placed in a high-impedance state. The default value after power-on or reset is 0000h.
Table 5. Monitor Register
DB15 DB14 DB13 DB12 DB11 DB10:DB0 V
MON
CONNECTS TO
0 0 0 0 1 Reserved
(1)
AIN
0 0 0 1 0 Reserved
(1)
DAC-0
0 0 1 0 0 Reserved
(1)
DAC-1
0 1 0 0 0 Reserved
(1)
DAC-2
1 0 0 0 0 Reserved
(1)
DAC-3
0 0 0 0 0 Reserved
(1)
Monitor disabled, Hi-Z (default)
(1) Writing to a reserved bit has no effect; reading the bit returns ' 0 ' .
Input Data Register for DAC-n (where n = 0, 1, 2, or 3). Default = 0000h.
This register stores the DAC data written to the device. When the data are loaded into the corresponding DAC
latch, the DAC output changes to the new level defined by the DAC data. The default value after power-on or
reset is 0000h.
For bipolar operation, the input data format is always twos complement. For unipolar operation, the input data
format is always straight binary.
Table 6. DAC-n ( n = 0, 1, 2, or 3) Input Data Register
MSB LSB
DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
D13
(1)
D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Reserved
(2)
(1) D13:D0 are the DAC data bits.
(2) Writing to a reserved bit has no effect; reading the bit returns ' 0 ' .
Table 7. DAC Output vs Twos Complement Code for Bipolar Output Operation
TWOS COMPLEMENT CODE (D13:D0) OUTPUT DESCRIPTION
0111 1111 1111 11 +0.5 × Gain × V
REF
× (8191/8192) +Full-Scale – 1 LSB
• • • • • • • • • • • • • • • • • •
0000 0000 0000 01 +0.5 × Gain × V
REF
× (1/8192) +1 LSB
0000 0000 0000 00 0 Zero
1111 1111 1111 11 – 0.5 × Gain × V
REF
× (1/8192) – 1 LSB
• • • • • • • • • • • • • • • • • •
1000 0000 0000 00 – 0.5 × Gain × V
REF
× (8192/8192) – Full-Scale
Table 8. DAC Output vs Straight Binary Code for Unipolar Output Operation
STRAIGHT BINARY CODE (D13:D0) OUTPUT DESCRIPTION
1111 1111 1111 11 Gain × V
REF
× (16383/16384) +Full-Scale – 1 LSB
• • • • • • • • • • • • • • • • • •
1000 0000 0000 00 Gain × V
REF
× (8192/16384) 1/2 Full-Scale
0111 1111 1111 11 Gain × V
REF
× (8191/16384) 1/2 Full-Scale – 1 LSB
• • • • • • • • • • • • • • • • • •
0000 0000 0000 00 0 Zero
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