Datasheet

DAC8218
www.ti.com SBAS460A –MAY 2009–REVISED DECEMBER 2009
SPI SHIFT REGISTER
The SPI Shift Register is 24 bits wide, as shown in Table 9. The register mapping is shown in Table 10; X = don't
care—writing to it has no effect, reading it returns '0'.
Table 9. Shift Register Format
MSB
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15:DB2 DB1:DB0
R/W X X A4 A3 A2 A1 A0 DATA X
R/W Indicates a read from or a write to the addressed register.
R/W = '0' sets a write operation and the data are written to the specified register.
R/W = '1' sets a read-back operation. Bits A4 to A0 select the register to be read. The remaining bits
are don’t care bits. During the next SPI operation, the data appearing on SDO pin are from the
previously addressed register.
A4:A0 Address bits that specify which register is accessed.
DATA 14 data bits
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