Datasheet
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AV
DD
NC
AIN-1
V -4
OUT
REF-B
V -5
OUT
V -6
OUT
AGND-B
AGND-B
OFFSET-B
V -7
OUT
AV
SS
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AV
DD
NC
AIN-0
V -3
OUT
REF-A
V -2
OUT
V -1
OUT
AGND-A
AGND-A
OFFSET-A
V -0
OUT
AV
SS
NC
V
MON
NC
NC
NC
WAKEUP
LDAC
SDO
NC
SDI
CS
SCLK
DV
DD
IOV
DD
DGND
NC
NC
RSTSEL
USB/BTC
NC
NC
NC
GPIO-2
CLR
RST
NC
NC
DV
DD
DGND
NC
NC
DGND
GPIO-1
GPIO-0
NC
NC
64 63 62 61 60 59 58 57 56 55 54
17
18 19 20
21 22
23
24
25 26
27
53 52 51 50 49
28 29 30 31 32
DAC8218
AV
DD
AIN-0
V -3
OUT
REF-A
V -2
OUT
V -1
OUT
AGND-A
AGND-A
OFFSET-A
V -0
OUT
AV
SS
V
MON
AV
DD
AIN-1
V -4
OUT
REF-B
V -5
OUT
V -6
OUT
AGND-B
AGND-B
OFFSET-B
V -7
OUT
AV
SS
NC
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
DAC8218
WAKEUP
LDAC
SDO
SDI
CS
SCLK
DV
DD
IOV
DD
DGND
NC
RSTSEL
USB/BTC
48
47
46
45
44
43
42
41
40
39
38
37
GPIO-2
CLR
RST
NC
DV
DD
NC
NC
DGND
NC
DGND
GPIO-1
GPIO-0
13
14
15
16
17
18
19
20
21
22
23
24
DAC8218
www.ti.com
SBAS460A –MAY 2009–REVISED DECEMBER 2009
PIN CONFIGURATIONS
PAG PACKAGE
RGZ PACKAGE
TQFP-64
QFN-48
(TOP VIEW)
(TOP VIEW)
(1) The thermal pad is internally connected to
the substrate. This pad can be connected
to AV
SS
or left floating. Keep the thermal
pad separate from the digital ground, if
possible.
PIN DESCRIPTIONS
PIN NO.
PIN
NAME
QFN-48 TQFP-64 I/O DESCRIPTION
AV
DD
1 1 I Positive analog power supply
AIN-0 2 3 I Auxiliary analog input 0, directly routed to the analog mux
V
OUT
-3 3 4 O DAC-3 output
REF-A 4 5 I Group A
(1)
reference input
V
OUT
-2 5 6 O DAC-2 output
V
OUT
-1 6 7 O DAC-1 output
AGND-A 7 8 I Group A analog ground and the ground of REF-A. This pin must be tied to AGND-B and DGND.
AGND-A 8 9 I Group A analog ground and the ground of REF-A. This pin must be tied to AGND-B and DGND.
OFFSET DAC-A analog output. Must be connected to AGND-A during single power-supply
OFFSET-A 9 10 O
operation (AV
SS
= 0V). This pin is not intended to drive an external load.
V
OUT
-0 10 11 O DAC-0 output
AV
SS
11 12 I Negative analog power supply
Analog monitor output. This pin is either in Hi-Z status, connected to one of the eight DAC outputs,
V
MON
12 14 O reference buffer outputs, offset DAC outputs, or one of the auxiliary analog inputs, depending on
the content of the Monitor Register. See the Monitor Register, Table 12, for details.
General-purpose digital input/output 2. This pin is a bidirectional digital input/output, open-drain and
GPIO-2 13 19 I/O
requires an external pull-up resistor. See the GPIO Pins section for details.
Clear input, level triggered. When the CLR pin is logic '0', all V
OUT
-X pins connect to AGND-x
CLR 14 20 I through switches and internal low-impedance. When the CLR pin is logic '1', all V
OUT
-X pins
connect to the amplifier outputs.
Reset input (active low). Logic low on this pin resets the DAC registers and DACs to the values
RST 15 21 I
defined by the RSTSEL pin. CS must be logic high when RST is active.
(1) Group A consists of DAC-0, DAC-1, DAC-2, and DAC-3. Group B consists of DAC-4, DAC-5, DAC-6, and DAC-7.
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