Datasheet
www.ti.com
EVM Operation
6 EVM Operation
This section provides information on the analog input, digital control, and general operating conditions of
the DAC8218EVM.
6.1 Analog Output
The DAC8218 has eight analog outputs that are available through the J1 header. Each of these output are
referenced to the board ground.
The OFFSET-A and OFFSET-B analog outputs are routed to TP5 and TP6. The OFFSET feature can only
be used in bipolar mode. A shunt must be placed across pins 1 and 2 to view the output on the test points.
The pins must be shorted directly to ground for unipolar/single-supply operation. For this mode, apply
shunts across pins 2 and 3 of JP6 and JP7 to short the OFFSET-A/-B pins to ground.
V
MON
is the channel monitor output. It can relay any of the eight analog output signals, the OFFSET-A/-B,
the Ref Buffer A/B, or either of the two A
IN
signals. The output pin has a 0.1μF capacitor connected. By
default, the V
MON
pin is in 3-state mode.
6.2 Digital Control
The digital control signals can be applied directly to J1 (top or bottom side). The DAC8218EVM can also
be connected directly to a DSP or microcontroller interface board.
No specific evaluation software is provided with this EVM; however, various code examples are available
that show how to use this EVM with a variety of digital signal processors from Texas Instruments. Please
check the specific device product folders or send an e-mail to dataconvapps@list.ti.com for a listing of
available code examples. The EVM Gerber files are also available on request.
6.3 Default Jumper Settings and Switch Positions
The DAC8218EVM has the ability to operate in either bipolar or unipolar mode. The proper jumper
conditions depend on which mode the evaluation module operates in. Table 5 summarizes the jumpers
found on the EVM.
Table 5. DAC8218EVM Jumpers
Jumper Name Description
JP1 REFASel1 Reference A: Select between 2.5V and 5.0V
onboard reference voltage
JP2 REFASel2 Reference A: Select between using the onboard ref
(from JP1) or an external reference
JP3 REFBSel1 Reference B: Select between 2.5V and 5.0V
onboard reference voltage
JP4 REFBSel2 Reference B: Select between using the onboard
reference (from JP3) or an external ref
JP6 OFFSETA OFFSET DAC A
JP7 OFFSETB OFFSET DAC B
JP9 IOVDDSel2 IOV
DD
: Select between 1.8V or the result from
IOVDDSel1 (JP10)
JP10 IOVDDSel1 Routes 5.0V or 3.3V to JP9
JP11 DVDDSel DV
DD
: Select between 5.0V and 3.3V
JP12 LDAC Selection Routes LDAC pin to either J2.15 or J2.17
JP14 Digital Digital control pins: Pulled high by default; apply
shunt to tie pins to ground
JP15 AVSS Sel Tie AVSS to J3.1
7
SBAU166A–February 2010–Revised May 2011 DAC8218EVM
Submit Documentation Feedback
Copyright © 2010–2011, Texas Instruments Incorporated