Datasheet

3 EVM Operation
3.1 Factory Default Setting
www.ti.com EVM Operation
Table 1. Parts List (continued)
Item Qty. Value Designators Description Vendor Vendor Part No.
20 6 2 × 1 × 0.7874 TH JMP1–JMP6 2-Pin Terminal Strip Samtec TSW-102-07-G-S
21 10 3 × 1 × 0.7874 TH JMP7–JMP16 3-Pin Terminal Strip Samtec TSW-103-07-G-S
22 7 1 × 1 × 0.040D TH TP1–TP3, TP5, Testpoint Mini-Loop
(1)
Keystone 5000
TP6, TP7,TP8 Electronics
23 2 1 × 1 × 0.061D TH TP4, TP9 Turret Terminal Pin Mill-Max 2348-2-00-01-00-00-07-0
24 1 N/A N/A Printed Wiring Board Texas Instruments 6498693
25 13 Do Not Populate C8, C9, C14, R5, Do not install these components
(1)
TBD TBD
R6, R17–R23,
R25
26 10 0.100 Shorting N/A Shorting Blocks Samtec SNT-100-BK-G-H
Blocks
27 0 N/A N/A Schematic Diagram Texas Instruments 6498694
28 0 N/A N/A Printed-Circuit Assembly Texas Instruments 6498695
29 0 N/A N/A Kit Assembly Texas Instruments 6498697
30 0 N/A N/A DAC8165 PCA Texas Instruments 6498696
31 0 N/A N/A DAC8165 Kit Texas Instruments 6498698
This section covers in detail the operation of the EVM to provide guidance to the user in evaluating the
onboard DAC and how to interface the EVM to a specific host processor.
See the DAC8164 or the DAC8165 data sheet, (SBAS410 or SBAS409 ), respectively, for information
about its serial interface and other related topics.
The EVM board is factory tested and configured to operate in the unipolar output mode.
The EVM board is set to its default configuration from the factory as described on the Table 2 to operate
in unipolar +2.5-V mode of operation. Figure 9 shows the default jumper configuration for the
DAC8164/65EVM.
Table 2. Factory Default Jumper Setting
Reference Jumper Function
JMP1 CLOSE ENABLE pin of the DAC8164/65 is tied to ground. DAC is permanently enabled.
JMP2 CLOSE LDAC pin of the DAC8164/65 is tied to ground. DAC update is controlled by software.
JMP3 CLOSE Address, A1, of DAC8164 is grounded (i.e., A1 = 0).
CLOSE RSTSEL pin of DAC8165 is grounded. DAC outputs reset to minimum scale.
JMP4 CLOSE Address A0 of DAC8164 is grounded (i.e., A0 = 0).
OPEN RST pin of DAC8165 is pulled up to IOV
DD
.
JMP5 OPEN V
REF
H is not routed to the inverting input of the operational amplifier for voltage offset (or for bipolar
mode of operation).
JMP6 OPEN Output operational amplifier, U2, is configured as voltage follower.
JMP7 1-2 Analog supply AV
DD
for the DAC8164/65 is +5 VA.
JMP8 OPEN Onboard external buffered reference U3 is not selected. Default is the +2.5-V internal reference of the
DAC8164/65.
JMP9 1-2 V
REF
L is connected to analog ground.
JMP10 1-2 Negative supply rail of U2 operational amplifier is supplied with V
SS
.
JMP11 1-2 DAC output (V
OUT
A) is routed to J4A-2.
JMP12 1-2 DAC output (V
OUT
B) is routed to J4A-4.
JMP13 1-2 DAC output (V
OUT
C) is routed to J4A-6.
JMP14 1-2 DAC output (V
OUT
D) is routed to J4A-8.
SLAU256 – August 2008 DAC8164/65 Evaluation Module 9
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