Datasheet

®
8
DAC813
See page 5
for I
I
FIGURE 2. Equivalent Input Circuit for Digital Inputs.
1kΩ
*
6.8V 5pF
Digital
Input
DCOM
* R = 500 for LLSB.Ω
I
I
the speed of the interface will be slower. A digital output
driving a DATA input line of the DAC813 must not drive,
or let the DATA input float, above +5.5V. Unused DATA
inputs should be connected to DCOM.
RESET FUNCTION
When asserted low (<0.8V), RESET (Pin 13) forces the
D/A latch to 800
HEX
regardless of any other input logic
condition. If the analog output is connected for bipolar
operation (either ±10V or ±5V), the output will be reset to
Bipolar Zero (0V). If the analog output is connected for
unipolar operation (0 to +10V), the output will be reset to
half-scale (+5V).
If RESET is not used, it should be connected to a voltage
greater than +2V but not greater than +5.5V. If this voltage
is not available Reset can be connected to +V
CC
through a
100kΩ to 1MΩ resistor to limit the input current.
GAIN AND OFFSET ADJUSTMENTS
Figures 3 and 4 illustrate the relationship of offset and gain
adjustments to unipolar and bipolar D/A converter output.
OFFSET ADJUSTMENT
For unipolar (USB) configurations, apply the digital input
code that should produce zero voltage output and adjust the
offset potentiometer for zero output. For bipolar (BOB,
BTC) configurations, apply the digital input code that should
produce the maximum negative output voltage and adjust
the offset potentiometer for minus full scale voltage. Ex-
ample: If the full scale range is connected for 20V, the
maximum negative output voltage is –10V. See Table III for
corresponding codes.
GAIN ADJUSTMENT
For either unipolar or bipolar configurations, apply the
digital input that should give the maximum positive voltage
output. Adjust the gain potentiometer for this positive full
scale voltage. See Table III for positive full scale voltages.
FIGURE 4. Relationship of Offset and Gain Adjustments
for a Bipolar D/A Converter.
FIGURE 3. Relationship of Offset and Gain Adjustments
for a Unipolar D/A Converter.
INSTALLATION
POWER SUPPLY CONNECTIONS
Note that the lid of the ceramic packaged DAC813 is
connected to –V
CC
. Take care to avoid accidental short
circuits in tightly spaced installations.
Power supply decoupling capacitors should be added as
shown in Figure 5. Optimum settling performance occurs
using a 1 to 10µF tantalum capacitor at –V
CC
and at least a
0.01µF ceramic capacitor at +V
CC
. Applications with less
critical settling time may be able to use 0.01µF at –V
CC
as
well. The 0.01µF capacitors should be located close to the
DAC813.
Pin 1 supplies internal logic and must be connected to +V
CC
.
+ Full Scale
All Bits
Logic 0
1LSB
Range of
Offset Adjust
Offset Adj.
Translates
the Line
Digital Input
All Bits
Logic 1
Analog Output
Full Scale
Range
Gain Adjust
Rotates the Line
– Full Scale
MSB on All
Others Off
Bipolar
Offset
Range of
Gain Adjust
≈ ±1%
≈ ±0.4%
+ Full Scale
All Bits
Logic 0
1LSB
Range of
Offset Adj.
Offset Adjust Translates the Line
Digital Input
All Bits
Logic 1
Range of
Gain Adjust
Analog Output
Gain Adjust
Rotates the Line
Full Scale Range
≈ ±0.4%
≈ ±1%
DIGITAL INPUT ANALOG OUTPUT
MSB to LSB 0 to +10V
±5V ±10V
FFF
HEX
+9.9976V +4.9976V +9.9951V
800
HEX
+5.0000V 0.0000V 0.0000V
7FF
HEX
+4.9976V –0.0024V –0.0049V
000
HEX
0.0000V –5.0000V –10.0000V
1LSB 2.44mV 2.44mV 4.88mV
TABLE III. Digital Input/Analog Output.