Datasheet
®
4
DAC813
MINIMUM TIMING DIAGRAMS
WRITE CYCLE #1
>5ns
> 50ns
> 50ns
(Load first rank from Data Bus: LDAC = 1)
DB11–DB0
WR
LLSB, LMSB
> 50ns
WRITE CYCLE #2
t
SETTLING
(Load second rank from first rank: LLSB, LMSB = 1)
WR
±1/2LSB
LDAC
> 50ns
> 50ns
RESET COMMAND (Bipolar Mode)
±1/2LSB
Reset
> 50ns
+10V
–10V
0V
t
SETTLING
V
OUT
LLSB, LMSB, LDAC, WR = Don’t Care