Datasheet

DAC7731
10
SBAS249B
www.ti.com
V
CC
REF
OUT
REF
IN
REFADJ
V
REF
R
OFFSET
AGND
RFB2
RFB1
SJ
V
OUT
V
DD
V
SS
REFEN
RSTSEL
SCLK
CS
SDO
SDI
LDAC
RST
NC
TEST
DGND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
DAC7731
1µF0.1µF
V
CC
1µF0.1µF
V
DD
Control/Data
Bus
1µF 0.1µF
V
SS
(–5V to +5V)
FIGURE 3. Basic Operation: V
OUT
= –5V to +5V.
THEORY OF OPERATION
The DAC7731 is a voltage output, 16-bit DAC with a +10V
built-in internal reference. The architecture is an R-2R ladder
configuration with the three MSBs segmented, followed by
an operational amplifier that serves as a buffer, as shown in
Figure 1. The output buffer is designed to allow user-
configurable output adjustments giving the DAC7731 output
voltage ranges of 0V to +10V, –5V to +5V, or –10V to +10V.
Please refer to Figures 2, 3, and 4 for pin configuration
information.
The digital input is a serial word made up of the DAC code
(MSB first) and is loaded into the DAC register using the
LDAC input pin. The converter can be powered from ±12V
to ±15V dual analog supplies and a +5V logic supply. The
device offers a reset function, which immediately sets the
DAC output voltage and DAC register to min-scale (code
0000
H
) or mid-scale (code 8000
H
). The data I/O and reset
functions are discussed in more detail in the following sec-
tions.
FIGURE 1. DAC7731 Architecture.
FIGURE 2. Basic Operation: V
OUT
= 0V to +10V.
2R2R 2R 2R 2R 2R 2R 2R 2R
R/4
R/2R/2 R/4
R/4
R
R
OFFSET
RFB2
RFB1
SJ
V
OUT
V
REF
V
REF
AGND
REF
IN
REF
ADJ
REF
OUT
+10V Internal
Reference
Buffer
V
CC
REF
OUT
REF
IN
REFADJ
V
REF
R
OFFSET
AGND
RFB2
RFB1
SJ
V
OUT
V
DD
V
SS
REFEN
RSTSEL
SCLK
CS
SDO
SDI
LDAC
RST
NC
TEST
DGND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
DAC7731
1µF0.1µF
V
CC
1µF0.1µF
V
DD
Control/Data
Bus
1µF 0.1µF
V
SS
(0V to +10V)