Datasheet
DAC7728
SBAS461A –JUNE 2009–REVISED NOVEMBER 2009
www.ti.com
ELECTRICAL CHARACTERISTICS: Single-Supply (continued)
All specifications at T
A
= T
MIN
to T
MAX
, AV
DD
= +32V, AV
SS
= 0V, DV
DD
= +5V, REF-A and REF-B = +5V, gain = 6, AGND-x =
DGND = 0V, and OFFSET-A = OFFSET-B = AGND, unless otherwise noted.
DAC7728
PARAMETER CONDITIONS MIN TYP MAX UNIT
Digital feedthrough
(11)
1 nV-s
T
A
= +25°C at 10kHz, gain = 6 200 nV/√Hz
Output noise T
A
= +25°C at 10kHz, gain = 4 130 nV/√Hz
0.1Hz to 10Hz, gain = 6 20 μV
PP
Power-supply rejection
(12)
AV
DD
= +33V to +36V 0.05 LSB
ANALOG MONITOR PIN (V
MON
)
Output impedance
(13)
T
A
= +25°C 2000 Ω
Three-state leakage current 100 nA
REFERENCE INPUT
Reference input voltage range
(14)
1.0 5.5 V
Reference input dc impedance 10 MΩ
Reference input capacitance 10 pF
DIGITAL INPUT
(15)
IOV
DD
= +4.5V to +5.5V 3.8 0.3 + IOV
DD
V
High-level input voltage, V
IH
IOV
DD
= +2.7V to +3.3V 2.3 0.3 + IOV
DD
V
IOV
DD
= +1.7V to +2.0V 1.5 0.3 + IOV
DD
V
IOV
DD
= +4.5V to +5.5V –0.3 0.8 V
Low-level input voltage, V
IL
IOV
DD
= +2.7V to +3.3V –0.3 0.6 V
IOV
DD
= +1.7V to +2.0V –0.3 0.3 V
CLR, LDAC, RST, A0 to A4, R/W, and CS ±1 μA
Input current
USB/BTC, RSTSEL, and D0 to D11 ±5 μA
CLR, LDAC, RST, A0 to A4, R/W, and CS 5 pF
Input capacitance USB/BTC, RSTSEL, and D0 to D11 12 pF
GPIO 14 pF
DIGITAL OUTPUT
(15)
IOV
DD
= +2.7V to +5.5V, sourcing 1mA IOV
DD
– 0.4 IOV
DD
V
High-level output voltage, V
OH
(D0 to D11)
IOV
DD
= +1.8V, sourcing 200μA 1.6 IOV
DD
V
IOV
DD
= +2.7V to +5.5V, sinking 1mA 0 0.4 V
Low-level output voltage, V
OL
(D0
to D11, BUSY, and GPIO)
IOV
DD
= +1.8V, sinking 200μA 0 0.2 V
High-impedance leakage current D0 to D11, BUSY, and GPIO ±5 μA
High-impedance output
BUSY and GPIO 14 pF
capacitance
(11) Digital feedthrough is the glitch impulse injected to the output of a DAC as a result of a digital code change in the DAC input register of
the same DAC. It is measured with the full-scale digital code change without updating the DAC output, and is expressed in nV-s.
(12) The analog output must not be greater than (AV
DD
– 0.5V).
(13) 8000Ω when V
MON
is connected to Reference Buffer A or B.
(14) Reference input voltage ≤ DV
DD
.
(15) Specified by design.
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