Datasheet

DAC7728
www.ti.com SBAS461A –JUNE 2009–REVISED NOVEMBER 2009
Zero Register n (where n = 0 to 7). Default = 000h.
The Zero Register stores the user-calibration data that are used to eliminate the offset error, as shown in
Table 14. The data are 12 bits wide, 1 LSB/step, and the total adjustment is –2048 LSB to +2047 LSB, or ±50%
of full-scale range. The Zero Register uses a twos complement data format.
Table 14. Zero Register
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Z11 Z10 Z9 Z8 Z7 Z6 Z5 Z4 Z3 Z2 Z1 Z0
Z11:Z0—OFFSET BITS ZERO ADJUSTMENT
7FFh +2047 LSB
7FEh +2046 LSB
••• ••• ••• ••• ••• •••
001h +1 LSB
000h 0 LSB (default)
FFFh –1 LSB
••• ••• ••• ••• ••• •••
801h –2047 LSB
800h –2048 LSB
Gain Register n (where n = 0 to 7). Default = 800h.
The Gain Register stores the user-calibration data that are used to eliminate the gain error, as shown in
Table 15. The data are 12 bits wide, 0.0244% FSR/step, and the total adjustment range is 0.5 to 1.5. The Gain
Register uses a straight binary data format.
Table 15. Gain Register
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
G11 G10 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0
G11:G0—GAIN-CODE BITS GAIN ADJUSTMENT COEFFICIENT
FFFh 1.499756
FFEh 1.499512
••• ••• ••• ••• ••• •••
801h 1.000244
800h 1 (default)
7FFh 0.999756
••• ••• ••• ••• ••• •••
001h 0.500244
000h 0.5
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