DAC7654 Evaluation Module User’s Guide April 2004 Data Acquisition SLAU130
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the supply voltage range of −5.25 V to 5.25 V and −15 V to 15 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
How to Use This Manual Preface Read This First About This Manual This user’s guide describes the DAC7654 evaluation module. It covers the operating procedures and characteristics of the EVM board along with the device that it supports. The physical PCB layout, schematic diagram, and circuit descriptions are included.
Contents Related Documentation From Texas Instruments To obtain a copy of any of the following TI documents, call the Texas Instruments Literature Response Center at (800) 477 – 8924 or the Product Information Center (PIC) at (972) 644 – 5580. When ordering, identify this manual by its title and literature number. Updated documents can also be obtained through our Web site at www.ti.com.
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Contents Contents 1 EVM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . .
Contents Figures 1−1 2−1 2−2 2−3 2−4 2−5 2−6 2−7 2−8 2−9 2−10 2−11 2−12 3−1 3−2 3−3 DAC7654 EVM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Top Silkscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Layer 1 (Top Signal Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 Layer 2 (Ground Plane) . .
Chapter 1 EVM Overview This chapter provides an overview of the DAC7654 evaluation module (EVM) and instructions on setting up and using the EVM. Topic Page 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 EVM Basic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features 1.1 Features This EVM features the DAC7654 digital-to-analog converters (DAC). It provides a quick and easy way to evaluate the functionality and performance of the high-resolution serial input quad DAC. The EVM provides the serial interface header to easily attach to any host microprocessor or TI DSP base system for communication. 1.2 Power Requirements The following sections describe the power requirements of this EVM. 1.2.
EVM Basic Functions 1.3 EVM Basic Functions This EVM is designed primarily as a functional evaluation platform to test certain functional characteristics of the DAC7654 DAC. Functional evaluation of the installed DAC device can be accomplished with the use of any microprocessor, TMS320 DSP family or some sort of a waveform generator.
EVM Basic Functions Figure 1−1. DAC7654 EVM Block Diagram VC C +3.3 VA 4 CH U2 Out put Buf f er M odule DACOut TP 5 W23 W6 W7 W8 W9 TP7 TP6 (J4) (P4) J5 8 CH VD D ±5 VA VOU T 4 CH (J 2) (P2) IOVDD VCC/VSS DACModule VOUTS2 VOUTS1 DGND AGND U1 W15 W5 TP 1 / TP 2 VOUTA / VOUTD VSS Q1/ Q2 W22/W24 TP 9 / TP 1 0 W11/W21 R1/R2 N OTE: a) See Sec t ion 3. 5 b) Same circuit for V OUT A and VOUT D. 1-4 (J6) (P6) 4 CH OFSR 2 OFSR 1 W1 W12 W13 W20 VC C GN D VSS GN D VD D ±5VA +3.
Chapter 2 PCB Design and Performance This chapter discusses the layout design of the PCB, describing the physical and mechanical characteristics of the EVM. It shows the resulting performance of the EVM, which can be compared to the device specification listed in the data sheet. The list of components used on the module is included in the bill of materials (BOM). Topic Page 2.1 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.
PCB Layout 2.1 PCB Layout The DAC7654 EVM is designed to demonstrate the performance quality of the installed DAC device under test, as specified in the data sheet. Careful analysis of the EVM’s physical restrictions and factors that contributes to the EVM’s performance degradation is the key to a successful design implementation.
PCB Layout Figure 2−1. Top Silkscreen Figure 2−2.
PCB Layout Figure 2−3. Layer 2 (Ground Plane) Figure 2−4.
PCB Layout Figure 2−5. Layer 4 (Bottom Signal Plane) Figure 2−6.
PCB Layout Figure 2−7.
EVM Performance 2.2 EVM Performance The EVM performance test is performed using a high density DAC bench test board, an Agilent 3458A digital multimeter, and a PC running the LABVIEW software. The EVM board is tested for all codes of the device under test (DUT) and is allowed to settle for 1 ms before the meter is read. This process is repeated for all codes to generate the measurements for INL and DNL results.
EVM Performance Figure 2−9.
EVM Performance Figure 2−10.
EVM Performance Figure 2−11.
EVM Performance Figure 2−12.
Bill of Materials 2.3 Bill of Materials Table 2−1. DAC7654 Bill of Materials Item # 2-12 Designator Manufacturer Part Number Description 0.01µF, 1206 Multilayer Ceramic Capacitor 0.
Chapter 3 EVM Operation This chapter covers in detail the operation of the EVM to provide guidance to the user in evaluating the onboard DAC and interfacing the EVM to a host processor. See the specific DAC data sheet, as listed in the Related Documentation from Texas Instruments section of this user’s guide, for more information about the DAC serial interface and other related topics. The EVM board is factory tested and configured to operate in the bipolar output mode. Topic Page 3.
Factory Default Setting 3.1 Factory Default Setting The EVM board is set to its default configuration from the factory as described in Table 3−1 to operate in bipolar ±2.5-V output operation. The following default jumper settings are shown in Figure 3−1. Table 3−1.
Host Processor Interface Figure 3−1. DAC7654 EVM Default Jumper Setting 3.2 Host Processor Interface The host processor drives the DAC; therefore, the DAC proper operation depends on the successful configuration between the host processor and the EVM board. In addition, a properly written code is required to operate the DAC. A custom cable can be made specific to the host interface platform.
EVM Stacking 3.3 EVM Stacking Stacking the EVM is possible if there is a need to evaluate two DAC7654 to yield a total of eight channel outputs. A maximum of two DAC7654 EVMs are allowed because the output terminal, J4, dictates the number of DAC channels that can be connected without the outputs colliding. Table 3−2 shows how the DAC output channels are mapped into the output terminal, J4, with respect to the jumper positions of W2, W3, W4, and W10. Table 3−2.
Digitally Programmable Current Source Application Table 3−3. Unity Gain Output Jumper Settings Reference 3.4.2 Jumper Setting Function Unipolar Bipolar W15 OPEN OPEN Disconnect the inverting input of operational amplifier, U2, from AGND. W5 2−3 1−2 Negative rail of operational amplifier is tied to AGND or powered by VSS. Output Gain of Two (Default Configuration) Table 3−4 below shows the proper jumper settings of the EVM for the 2x gain output of the DAC. Table 3−4.
Digitally Programmable Current Source Application Table 3−5.
Jumper Settings 3.6 Jumper Settings Table 3−6 shows the function of each specific jumper setting of the EVM. Table 3−6. Jumper Setting Function Reference Jumper Setting Function 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 Negative supply rail of the output operational amplifier, U2, is powered by VSS for bipolar operation. 1 3 Negative supply rail of the output operational amplifier, U2, is tied to AGND for unipolar operation. VOUTSENSE1A is a feedback to VOUTA.
Jumper Settings W11 1 3 1 3 1 3 1 3 1 3 1 3 1 3 VOUTSENSE1A is used for 4−20 mA drive Digitally programmable current source application is not used VOUTSENSE2A is used for digitally programmable current source VOUTSENSE1B is a feedback to VOUTB W12 VOUTSENSE2B is a feedback to VOUTB VOUTSENSE1C is a feedback to VOUTC W13 VOUTSENSE2C is a feedback to VOUTC RST is pulled up via R5 resistor W14 RST is pulled down to DGND and device is held on reset state Configures output operational amplifie
Schematics VOUTD is not connected for digitally programmable current source operation W24 VOUTD is connected for digitally programmable current source operation 1 3 VSS of the DUT is connected to AGND for unipolar mode of operation 1 3 VSS of the DUT is connected to −5-V supply for bipolar mode of operation 1 3 1 3 1 3 1 3 W25 GPIO4 is used to drive the LDAC signal of the DUT W26 GPIO0 is used to drive the LDAC signal of the DUT CS is used to drive the CS signal of the DUT W27 Disconnec
1 2 3 4 5 6 Revision History REV P2 J4 +5VA VoutB W3 +3.3VD C11 VoutC W4 C7 0.1µF C5 10µF VoutD W1 TP1 W12 Q1 NPN TRANSISTOR W13 TP9 W11 VoutS1B VoutB VoutS2B W7 VoutS1A VoutS1C VoutC VoutS2C W8 R1 125 VoutS2A VoutS1A VoutA VoutS2A W6 W22 W20 -5VA + C4 10µF + VoutS1D VoutD VoutS2D W9 C1 0.
