Datasheet

DAC7642, DAC7643
5
SBAS233
www.ti.com
20 R/W Enabled by CS, Controls Data Read from and Write
to the Input Registers.
21 LOADDACS DAC Output Registers Load Control. Rising edge
triggered. Transfers Data from the Input Registers to
the DAC Registers, Updating the DAC Output.
22 RST Reset, Rising Edge Triggered. DAC7642 resets to
mid-scale, DAC7643 resets to zero. (Resets Both
Input Registers and DAC Registers)
23 DACSEL Enabled by CS. Selects the individual DAC Input
Registers. (LOW Selects Register A, HIGH Selects
Register B)
24 V
SS
Negative Power Supply
25 V
OUT
B DAC B Voltage Output
26 V
OUT
B Sense DAC B Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
27 V
REF
H Sense DAC A and B Reference High Sense Input
28 V
REF
H DAC A and B Reference High Input
29 V
OUT
L DAC A and B Reference Low Input
30 V
REF
L Sense DAC A and B Reference Low Sense Input
31 V
OUT
A Sense DAC A Output Amplifier Inverting Input. Used to
close the feedback loop at the load.
32 V
OUT
A DAC A Output Voltage
Top View LQFP
PIN CONFIGURATION
V
CC
GND
DB15
DB14
DB13
DB12
DB11
DB10
V
SS
DACSEL
RST
LOADDACS
R/W
CS
DB0
DB1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
DAC7642
DAC7643
V
OUT
A
V
OUT
A Sense
V
REF
L Sense
V
REF
L
V
REF
H
V
REF
H Sense
V
OUT
B Sense
V
OUT
B
32 31 30 29 28 27 26 25
DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2
9
10 11 12 13 14 15 16
PIN DESCRIPTIONS
PIN NAME DESCRIPTION
1V
CC
Positive Power Supply
2 GND Ground
3 DB15 Data Bit 15, MSB
4 DB14 Data Bit 14
5 DB13 Data Bit 13
6 DB12 Data Bit 12
7 DB11 Data Bit 11
8 DB10 Data Bit 10
9 DB9 Data Bit 9
10 DB8 Data Bit 8
11 DB7 Data Bit 7
12 DB6 Data Bit 6
13 DB5 Data Bit 5
14 DB4 Data Bit 4
15 DB3 Data Bit 3
16 DB2 Data Bit 2
17 DB1 Data Bit 1
18 DB0 Data Bit 0, LSB
19 CS Chip Select, Active LOW
PIN NAME DESCRIPTION