Datasheet

17
®
DAC7641
t
RCS
CS
t
RDS
t
RDH
t
CSD
t
DZ
R/W
Data Out
Data Valid
t
WCS
CS
t
WS
t
WH
R/W
t
LS
t
LWD
t
LH
t
S
±0.003% of FSR
Error Band
±0.003% of FSR
Error Band
t
LX
LDAC
t
DS
t
DH
Data In
V
OUT
Data Read Timing
Data Write Timing
t
RSH
RST
V
OUT
, RSTSEL LOW
+FS
–FS
t
SS
t
SH
RSTSEL
V
OUT
, RSTSEL HIGH
MS
+FS
–FS
DAC7641 Reset Timing
t
RSS
FIGURE 14. Digital Input and Output Timing.
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
RCS
CS LOW for Read 150 ns
t
RDS
R/W HIGH to CS LOW 10 ns
t
RDH
R/W HIGH after CS HIGH 10 ns
t
DZ
CS HIGH to Data Bus in High Impedance 10 100 ns
t
CSD
CS LOW to Data Bus Valid 100 150 ns
t
WCS
CS LOW for Write 40 ns
t
WS
R/W LOW to CS LOW 0 ns
t
WH
R/W LOW after CS HIGH 10 ns
t
LS
CS LOW to LDAC HIGH 30 ns
t
LH
CS LOW after LDAC HIGH 100 ns
t
LX
LDAC HIGH 100 ns
t
DS
Data Valid to CS LOW 0 ns
t
DH
Data Valid after CS HIGH 10 ns
t
LWD
LDAC LOW 100 ns
t
SS
RSTSEL Valid Before RESET HIGH 0 ns
t
SH
RSTSEL Valid After RESET HIGH 200 ns
t
RSS
RESET LOW Before RESET HIGH 10 ns
t
RSH
RESET LOW After RESET HIGH 10 ns
t
S
Settling Time 10 µs
TABLE II. Timing Specifications (T
A
= –40°C to +85°C).