Datasheet
4
®
DAC7624/7625
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V
REFH
V
OUTB
V
OUTA
V
SS
GND
RESET
LDAC
(LSB) DB0
DB1
DB2
DB3
DB4
DB5
DB6
V
REFL
V
OUTC
V
OUTD
V
DD
NIC
CS
A0
A1
R/W
DB11 (MSB)
DB10
DB9
DB8
DB7
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DAC7624
DAC7625
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V
REFH
V
OUTB
V
OUTA
V
SS
GND
RESET
LDAC
(LSB) DB0
DB1
DB2
DB3
DB4
DB5
DB6
V
REFL
V
OUTC
V
OUTD
V
DD
NIC
CS
A0
A1
R/W
DB11 (MSB)
DB10
DB9
DB8
DB7
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DAC7624
DAC7625
Top View
DIP SOIC
PIN DESCRIPTIONS
PIN CONFIGURATIONS
PIN NAME DESCRIPTION
1V
REFH
Reference Input Voltage High. Sets maximum output voltage for all DACs.
2V
OUTB
DAC B Voltage Output.
3V
OUTA
DAC A Voltage Output.
4V
SS
Negative Analog Supply Voltage, 0V or –5V.
5 GND Ground.
6 RESET Asynchronous Reset Input. Sets DAC and input registers to either mid-scale (800
H
, DAC7624) or zero-scale (000
H
, DAC7625)
when LOW.
7 LDAC Load DAC Input. All DAC Registers are transparent when LOW.
8 DB0 Data Bit 0. Least significant bit of 12-bit word.
9 DB1 Data Bit 1
10 DB2 Data Bit 2
11 DB3 Data Bit 3
12 DB4 Data Bit 4
13 DB5 Data Bit 5
14 DB6 Data Bit 6
15 DB7 Data Bit 7
16 DB8 Data Bit 8
17 DB9 Data Bit 9
18 DB10 Data Bit 10
19 DB11 Data Bit 11. Most significant bit of 12-bit word.
20 R/W Read/Write Control Input (read = HIGH, write = LOW).
21 A1 Register/DAC Select (C or D = HIGH, A or B = LOW).
22 A0 Register/DAC Select (B or D = HIGH, A or C = LOW).
23 CS Chip Select Input.
24 NIC Not Internally Connected. Pin has no internal connection to the device.
25 V
DD
Positive Analog Supply Voltage, +5V nominal.
26 V
OUTD
DAC D Voltage Output.
27 V
OUTC
DAC C Voltage Output.
28 V
REFL
Reference Input Voltage Low. Sets minimum output voltage for all DACs.