DAC7571, DAC6571, DAC5571, DAC7574, DAC6574, DAC5574, and DAC8571 Evaluation Module User’s Guide February 2004 Data Acquisition SLAU117A
Preface Read This First About This Manual This user’s guide describes the DAC7574, DAC6574, DAC5574, DAC7571, DAC6571, DAC5571, and DAC8571 evaluation module. It covers the operating procedures and characteristics of the EVM board along with the devices that it supports.
The information in a caution or a warning is provided for your protection. Please read each caution and warning carefully. Related Documentation From Texas Instruments To obtain a copy of any of the following TI documents, call the Texas Instruments Literature Response Center at (800) 477–8924 or the Product Information Center (PIC) at (972) 644–5580. When ordering, identify this manual by its title and literature number. Updated documents can also be obtained through our website at www.ti.com.
Contents 1 EVM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .
Figures 1-1 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9 2 - 10 2 - 11 2 - 12 2 - 13 2 - 14 EVM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5 Top Silkscreen . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 Layer 1 (Top Signal Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 0 V - VDD +0.3 V and the output voltage range of ±10 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Chapter 1 EVM Overview This chapter provides an overview of the DAC7574, DAC6574, DAC5574, DAC7571, DAC6571, DAC5571, and DAC8571 evaluation module (EVM), and instructions on setting up and using this module. Topic Page 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 EVM Basic Functions . . . . . . . . . . . . .
Features 1.1 Features This EVM features the DAC7574, DAC6574, DAC5574, DAC7571, DAC6571, DAC5571, and DAC8571 digital-to-analog converter (DAC). It provides a quick and easy way to evaluate the functionality and performance of the high-resolution as well as the low - resolution I2C-input DACs. Although the EVM supports seven DAC types, only the selected DAC and its associated components are installed to simplify configuration. The table below shows the seven DAC types this EVM supports.
Power Requirements 1.2 Power Requirements The following sections describe the power requirements of this EVM. 1.2.1 Supply Voltage The dc power supply for the digital section (VDD) of this EVM is selected between 3.3 V and 5 V via the 3-position jumper W14. The digital power connects to the J5- 1, J6 - 9, or J6 - 10 terminal (when plugged in with another EVM board or interface card) and is referenced to ground through the J5 - 2 and J6- 5 terminals.
EVM Basic Functions 1.2.2 Reference Voltage The 5-V precision voltage reference is provided to supply the external voltage reference for the DAC8571 only through REF02, U3, via jumper TP9 by shorting pins 1 and 2. The reference voltage goes through an adjustable 5-kΩ potentiometer R11 in series with 0-Ω R10, to allow the user to adjust the reference voltage.
EVM Basic Functions A specific adapter interface card is also available for most of TI’s DSP Starter Kits (DSK). The card model depends on the type of TI DSP Starter Kit to be used. When ordering an adapter interface card, specify the DSP that will be used. In addition, an MSP430- based platform (HPA449) that uses the MSP430F449 microprocessor can be used with this EVM. For more information regarding the adapter interface card or the HPA449 platform, please call Texas Instruments Inc.
1-6
Chapter 2 PCB Design and Performance This chapter describes the physical and mechanical characteristics of the EVM and compares the performance of the EVM with the device data sheets. The bill of materials is also included in this chapter. Topic Page 2.1 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 EVM Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.
PCB Layout 2.1 PCB Layout The DAC EVM demonstrates the high performance of the DAC under test conditions specified in the datasheet by implementing design practices that preserve DAC performance. Careful analysis of these practices is the key to a successful design implementation. Many of the practices affect the schematic design phase, including correct component selection, adequate bypassing, separating and managing analog and digital signals, and understanding component mechanical attributes.
PCB Layout Figure 2 - 2. Layer 1 (Top Signal Plane) Figure 2 - 3. Layer 2 (Ground Plane) Figure 2 - 4.
PCB Layout Figure 2 - 5. Layer 4 (Bottom Signal Plane) Figure 2 - 6.
PCB Layout Figure 2 - 7. Drill Drawing 400 - mil Notes: 1. PWB to be fabricated to meet or exceed PC - 6012, class 3 standards and workmanship shall conform to IPC - A - 600, class 3 - current revisions. 2. Board material and construction to be UL approved and marked on the finished boards. 3. Laminate Material: Copper - clad FR - 4 4. Copper weight: 1oz finished 5. Finished thickness: .062 ± .010 6. Min plating thickness in through holes: .001” 7. SMOBC / HASL 8.
EVM Performance 2.2 EVM Performance EVM performance is tested using a high-density DAC bench test board, an Agilent 3458A digital multimeter, and a PC running National Instruments LABVIEW software. The EVM board is tested for all codes of the device under test (DUT) and is allowed to settle for 1 ms before the meter is read. This process is repeated for all codes to generate the measurements for INL and DNL.
EVM Performance Figure 2 - 9.
EVM Performance Figure 2 - 10.
EVM Performance Figure 2 - 11.
EVM Performance Figure 2 - 12.
EVM Performance Figure 2 - 13.
EVM Performance Figure 2 - 14.
Bill of Materials 2.3 Bill of Materials Table 2 - 1. Parts List Item # 1 2 3 4 Qty 2 4 1 2 Designator C9 C10 C1 C2 C3 C4 C12 C5 C11 Mfr.
2-14
Chapter 3 EVM Operation This chapter details the operation of the EVM to guide the user in evaluating the onboard DAC and in interfacing the EVM to a host processor. Refer to the specific DAC data sheet, as listed in the Related Documentation from Texas Instruments section in the Preface of this user’s guide for more information about the DAC serial interface and other related topics. The EVM board is factory-configured to operate in the unipolar output mode. Topic Page 3.1 Factory Default Setting . .
Factory Default Setting 3.1 Factory Default Setting The EVM board is factory-configured to operate in unipolar 5-V output mode. Table 3 - 1. DAC7574/DAC6574/DAC5574 EVM Factory Default Jumper Setting DAC7574/DAC6574/DAC5574 EVM CONFIGURATION Reference Jumper Position Function W1 2-3 Power supply for U1 is 5 VA. W2 1-2 DAC output A (VOUTA) is routed to J4 - 2. W3 OPEN U2 is configured as unity gain op-amp. W4 2-3 SDA is routed to SDATA.
Host Processor Interface Table 3 - 3. DAC8571EVM Factory Default Jumper Setting DAC8571 EVM CONFIGURATION Jumper Position Reference Function W1 2-3 Power supply for the DAC8571 is 5 VA. W2 1-2 DAC output is routed to J4 - 2. W3 OPEN U2 is configured as unity gain op-amp. W4 2-3 SDA is routed to SDATA.. W5 1-2 Negative supply rail of U2 op-amp is supplied with VSS. W6 2-3 SCL is routed to SCLK.
EVM Stacking 3.3 EVM Stacking EVM stacking enables the designer to evaluate two DACx574s in tandem to yield an eight channel output, or two DACx571s, or two DAC8571s. Any combination of the seven may be used provided the outputs do not collide. A maximum of two DACx574 EVMs are allowed since the output terminal, J4, dictates the number of DAC channels that can be connected without colliding.
The Output Op Amp Table 3 - 7. DAC7574/DAC6574/DAC5574 I 2C Slave Address Map Factory Set I2C Address W7 W8 R/W I2C Address and Function 1 0 0 1 1 Open Open 0 0x9E (Write) 1 0 0 1 1 Open Close 0 0x9C (Write) 1 0 0 1 1 Close Open 0 0x9A (Write) 1 0 0 1 1 Close Close 0 0x98 (Write) 1 0 0 1 1 Open Open 1 0x9F (Read) 1 0 0 1 1 Open Close 1 0x9D (Read) 1 0 0 1 1 Close Open 1 0x9B (Read) 1 0 0 1 1 Close Close 1 0x99 (Read) Table 3 - 8.
The Output Op Amp easy access for monitoring up to eight DAC channels when stacking two DACx574 EVMs together, as described in section 3.3. The inverting input of U2 can be tied to AGND or to any voltage source through TP2, which is selectable by the jumper configuration of W3. The voltage source connected to TP2 is adjustable via potentiometer R14. The following sections describe various configurations of the output amplifier, U2. 3.4.
Jumper Setting 3.5 Jumper Setting Table 3 - 12 shows the function of each specific jumper setting of the EVM. Table 3 - 12.Jumper Setting Function Reference W1 W2 W3 W4 W5 W6 Jumper Setting 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 Function 5 - V analog supply is selected for AVDD. +3.3 - V analog supply is selected for AVDD.
Jumper Setting Reference Jumper Setting Function U4 VSENSE pin is disconnected to its VOUT pin. W10 U4 VSENSE pin is connected to its VOUT pin. W11 W12 W13 W14 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 Routes VOUTB to J4 - 4 Routes VOUTB to J4 - 12 Routes VOUTC to J4 - 6 Routes VOUTC to J4 - 14 Routes VOUTD to J4 - 8 Routes VOUTD to J4 - 16 Connects 3.
Schematic 3.6 Schematic The schematic diagram follows this page.
1 2 3 4 5 6 Revision History REV +5VA W1 6 C1 0.1µF A0 4 C5 10µF SDA 5 SCL U1 8 Ad_1 (A1) 10 Ad_0 (A0) 9 SDATA R15 440 SD1 7 SCLK R16 440 SK1 6 3 R17 440 W8 W7 R18 440 SK2 R23 0 SD3 R20 440 SK3 D 2 GND VCC R1 0 DAC7571 (Address: nW=9A, R=9B) VDD VoutA C9 0.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
