Datasheet

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PIN DESCRIPTION
1
2
3
4
12
11
10
9
SCLK
SYNC
IOV
DD
SDO
V
OUT
A
V
DD
GND
V
OUT
B
VFBA VREFA
PD
DCEN
CLR SDIN
VFBB
VREFB
16 15 14 13
5 6 7 8
DAC7553
SLAS477 – SEPTEMBER 2005
RGT PACKAGE
(TOP VIEW)
Terminal Functions
TERMINAL DESCRIPTION
NO. NAME
1 VOUTA Analog output voltage from DAC A
2 VDD Analog voltage supply input
3 GND Ground
4 VOUTB Analog output voltage from DAC B
5 VFBB DAC B amplifier sense input.
6 VREFB Positive reference voltage input for DAC B
7 PD Power down
8 DCEN Daisy-chain enable
9 SDO Serial data output
10 IOVDD I/O voltage supply input
11 SYNC Frame synchronization input. The falling edge of the SYNC pulse indicates the start of a serial data frame shifted out
to the DAC7553
12 SCLK Serial clock input
13 SDIN Serial data input
14 CLR Asynchronous input to clear the DAC registers. When CLR is low, the DAC registers are set to 000H and the output to
midscale voltage.
15 VREFA Positive reference voltage input for DAC A
16 VFBA DAC A amplifier sense input.
6