Datasheet

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ELECTRICAL CHARACTERISTICS
DAC7553
SLAS477 – SEPTEMBER 2005
V
DD
= 2.7 V to 5.5 V, V
REF
= V
DD
, R
L
= 2 k Ω to GND; C
L
= 200 pF to GND; all specifications –40°C to 105°C, unless otherwise
specified
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
STATIC PERFORMANCE
(1)
Resolution 12 Bits
Relative accuracy ±0.35 ±1 LSB
Differential nonlinearity Specified monotonic by design ±0.08 ±0.5 LSB
Offset error ±12 mV
Zero-scale error All zeroes loaded to DAC register ±12 mV
Gain error ±0.15 %FSR
Full-scale error ±0.5 %FSR
Zero-scale error drift 7 µV/ °C
Gain temperature coefficient 3 ppm of FSR/ °C
PSRR V
DD
= 5 V 0.75 mV/V
OUTPUT CHARACTERISTICS
(2)
Output voltage range 0 VREF V
Output voltage settling time R
L
= 2 k Ω; 0 pF < C
L
< 200 pF 5 µs
Slew rate 1.8 V/ µs
Capacitive load stability R
L
= ∞ 470
pF
R
L
= 2 k Ω 1000
Digital-to-analog glitch impulse 1 LSB change around major carry 0.1 nV-s
Channel-to-channel crosstalk 1-kHz full-scale sine wave, –100 dB
outputs unloaded
Digital feedthrough 0.1 nV-s
Output noise density (10-kHz offset 120 nV/rtHz
frequency)
Total harmonic distortion F
OUT
= 1 kHz, F
S
= 1 MSPS, –85 dB
BW = 20 kHz
DC output impedance 1 Ω
Short-circuit current V
DD
= 5 V 50
mA
V
DD
= 3 V 20
Power-up time Coming out of power-down mode, 15
V
DD
= 5 V
µs
Coming out of power-down mode, 15
V
DD
= 3 V
REFERENCE INPUT
VREF Input range 0 V
DD
V
Reference input impedance V
REF
A and V
REF
B shorted together 50 k Ω
V
REF
A = V
REF
B = V
DD
= 5 V, 100 250
V
REF
A and V
REF
B shorted together
Reference current µA
V
REF
A = V
REF
B = V
DD
= 3 V, 60 123
V
REF
A and V
REF
B shorted together
LOGIC INPUTS
(2)
Input current ±1 µA
V
IN_L
, Input low voltage IOV
DD
≥ 2.7 V 0.3 IOV
DD
V
V
IN_H
, Input high voltage IOV
DD
≥ 2.7 V 0.7 IOV
DD
V
Pin capacitance 3 pF
(1) Linearity tested using a reduced code range of 30 to 4065; output unloaded.
(2) Specified by design and characterization, not production tested. For 1.8 V < IOV
DD
< 2.7 V, It is recommended that
V
IH
= IOV
DD
, V
IL
= GND.
3