Datasheet

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INTEGRAL AND DIFFERENTIAL LINEARITY
GLITCH ENERGY
CHANNEL-TO-CHANNEL CROSSTALK
APPLICATION INFORMATION
Waveform Generation
Generating ±5-V, ±10-V, and ± 12-V Outputs For
DAC7553
V
REF
H
DAC7553
_
+
V
dac
R2
R1
REF3140
V
REF
V
tail
V
OUT
OPA130
DAC7553
SLAS477 – SEPTEMBER 2005
each DAC step determines the minimum incremental
change the loop can generate. A DNL error less than
The DAC7553 uses precision thin-film resistors
–1 LSB (non-monotonicity) can create loop instability.
providing exceptional linearity and monotonicity.
A DNL error greater than +1 LSB implies
Integral linearity error is typically within (+/-) 0.35
unnecessarily large voltage steps and missed voltage
LSBs, and differential linearity error is typically within
targets. With high DNL errors, the loop loses its
(+/-) 0.08 LSBs.
stability, resolution, and accuracy. Offering 12-bit
ensured monotonicity and ± 0.08 LSB typical DNL
error, 755X DACs are great choices for precision
control loops.
The DAC7553 uses a proprietary architecture that
minimizes glitch energy. The code-to-code glitches
Loop Speed:
are so low, they are usually buried within the
Many factors determine control loop speed. Typically,
wide-band noise and cannot be easily detected. The
the conversion time of the ADC and the computation
DAC7553 glitch is typically well under 0.1 nV-s. Such
time of the MCU are the two major factors that
low glitch energy provides more than 10X
dominate the time constant of the loop. DAC settling
improvement over industry alternatives.
time is rarely a dominant factor because ADC
conversion times usually exceed DAC conversion
times. DAC offset, gain, and linearity errors can slow
The DAC7553 architecture is designed to minimize
the loop down only during the start-up. Once the loop
channel-to-channel crosstalk. The voltage change in
reaches its steady-state operation, these errors do
one channel does not affect the voltage output in
not affect loop speed any further. Depending on the
another channel. The DC crosstalk is in the order of a
ringing characteristics of the loop's transfer function,
few microvolts. AC crosstalk is also less than –100
DAC glitches can also slow the loop down. With its 1
dBs. This provides orders of magnitude improvement
MSPS (small-signal) maximum data update rate,
over certain competing architectures.
DAC7553 can support high-speed control loops.
Ultralow glitch energy of the DAC7553 significantly
improves loop stability and loop settling time.
Generating Industrial Voltage Ranges:
For control loop applications, DAC gain and offset
Due to its exceptional linearity, low glitch, and low
errors are not important parameters. This could be
crosstalk, the DAC7553 is well suited for waveform
exploited to lower trim and calibration costs in a
generation (from DC to 10 kHz). The DAC7553
high-voltage control circuit design. Using an
large-signal settling time is 5 µs, supporting an
operational amplifier (OPA130), and a voltage
update rate of 200 KSPS. However, the update rates
reference (REF3140), the DAC7553 can generate the
can exceed 1 MSPS if the waveform to be generated
wide voltage swings required by the control loop.
consists of small voltage steps between consecutive
DAC updates. To obtain a high dynamic range,
REF3140 (4.096 V) or REF02 (5 V) are
recommended for reference voltage generation.
Precision Industrial Control
Industrial control applications can require multiple
feedback loops consisting of sensors, ADCs, MCUs,
DACs, and actuators. Loop accuracy and loop speed
are the two important parameters of such control
loops.
Figure 31. Low-cost, Wide-swing Voltage
Generator for Control Loop Applications
Loop Accuracy:
In a control loop, the ADC has to be accurate. Offset,
The output voltage of the configuration is given by:
gain, and the integral linearity errors of the DAC are
not factors in determining the accuracy of the loop.
As long as a voltage exists in the transfer curve of a
monotonic DAC, the loop can find it and settle to it.
On the other hand, DAC resolution and differential
linearity do determine the loop accuracy, because
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