Datasheet

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THEORY OF OPERATION
D/A SECTION OUTPUT BUFFER AMPLIFIERS
DAC External Reference Input
_
+
Resistor String
Ref +
Ref −
DAC Register
V
OUT
V
REF
GND
V
FB
100 k100 k
50 k
Amplifier Sense Input
V
REF
To Output
Amplifier
R
R R
R
GND
RESISTOR STRING
Power-On Reset
DAC7553
SLAS477 – SEPTEMBER 2005
The architecture of the DAC7553 consists of a string The output buffer amplifier is capable of generating
DAC followed by an output buffer amplifier. Figure 29 rail-to-rail voltages on its output, which gives an
shows a generalized block diagram of the DAC output range of 0 V to V
DD
. It is capable of driving a
architecture. load of 2 k Ω in parallel with up to 1000 pF to GND.
The source and sink capabilities of the output
amplifier can be seen in the typical curves. The slew
rate is 1.8 V/µs with a typical settling time of 3 µs with
the output unloaded.
Two separate reference pins are provided for two
DACs, providing maximum flexibility. VREFA serves
DAC A and VREFB serves DAC B. VREFA and
Figure 29. Typical DAC Architecture
VREFB can be externally shorted together for
simplicity.
The 2s-complement input coding to the DAC7553
It is recommended to use a buffered reference in the
gives the ideal output voltage as:
external circuit (e.g., REF3140). The input impedance
V
OUT
= VREF × D/4096
is typically 100 k Ω for each reference input pin..
Where D = decimal equivalent of the 2s-complement
input that is loaded to the DAC register, which can
range from 0 to 4095.
The DAC7553 contains two amplifier feedback input
pins, VFBA and VFBB. For voltage output operation,
VFBA and VFBB must externally connect to VOUTA
and VOUTB, respectively. For better DC accuracy,
these connections should be made at load points.
The VFBA and VFBB pins are also useful for a
variety of applications, including digitally controlled
current sources. Each feedback input pin is internally
connected to the DAC amplifier's negative input
terminal through a 100-k Ω resistor; and, the
Figure 30. Typical Resistor String
amplifier's negative input terminal internally connects
to ground through another 100-k Ω resistor (See
Figure 29 ). This forms a gain-of-two, noninverting
amplifier configuration. Overall gain remains one
The resistor string section is shown in Figure 30 . It is
because the resistor string has a divide-by-two
simply a string of resistors, each of value R. The
configuration. The resistance seen at each VFBx pin
digital code loaded to the DAC register determines at
is approximately 200 k Ω to ground.
which node on the string the voltage is tapped off to
be fed into the output amplifier. The voltage is tapped
off by closing one of the switches connecting the
On power up, all internal registers are cleared and all
string to the amplifier. Because it is a string of
channels are updated with midscale voltages. Until
resistors, it is specified monotonic. The DAC7553
valid data is written, all DAC outputs remain in this
architecture uses four separate resistor strings to
state. This is particularly useful in applications where
minimize channel-to-channel crosstalk.
it is important to know the state of the DAC outputs
while the device is powering up. In order not to turn
on ESD protection devices, V
DD
should be applied
before any other pin is brought high.
15