Datasheet

_
+
Resistor String
Ref +
Ref −
DAC Register
V
OUT
V
REF
GND
V
FB
100 kW100 kW
50 kW
V
REF
To Output
Amplifier
R
R R
R
GND
DAC7552
SLAS442D –JANUARY 2005– REVISED JUNE 2011 www.ti.com
THEORY OF OPERATION
DAC External Reference Input
D/A SECTION
Two separate reference pins are provided for two
The architecture of the DAC7552 consists of a string
DACs, providing maximum flexibility. VREFA serves
DAC followed by an output buffer amplifier. Figure 29
DAC A and VREFB serves DAC B. VREFA and
shows a generalized block diagram of the DAC
VREFB can be externally shorted together for
architecture.
simplicity.
It is recommended to use a buffered reference in the
external circuit (e.g., REF3140). The input impedance
is typically 100 kΩ for each reference input pin.
Amplifier Sense Input
The DAC7552 contains two amplifier feedback input
pins, VFBA and VFBB. For voltage output operation,
VFBA and VFBB must externally connect to VOUTA
Figure 29. Typical DAC Architecture
and VOUTB, respectively. For better DC accuracy,
these connections should be made at load points.
The VFBA and VFBB pins are also useful for a
The input coding to the DAC7552 is unsigned binary,
variety of applications, including digitally controlled
which gives the ideal output voltage as:
current sources. Each feedback input pin is internally
V
OUT
= VREF × D/4096
connected to the DAC amplifier's negative input
Where D = decimal equivalent of the binary code that
terminal through a 100-kΩ resistor; and, the
is loaded to the DAC register which can range from 0
amplifier's negative input terminal internally connects
to 4095.
to ground through another 100-kΩ resistor (See
Figure 29). This forms a gain-of-two, noninverting
amplifier configuration. Overall gain remains one
because the resistor string has a divide-by-two
configuration. The resistance seen at each VFBx pin
is approximately 200 kΩ to ground.
Power-On Reset
On power up, all internal registers are cleared and all
Figure 30. Typical Resistor String
channels are updated with zero-scale voltages. Until
valid data is written, all DAC outputs remain in this
state. This is particularly useful in applications where
RESISTOR STRING
it is important to know the state of the DAC outputs
while the device is powering up. In order not to turn
The resistor string section is shown in Figure 30. It is
on ESD protection devices, V
DD
should be applied
simply a string of resistors, each of value R. The
before any other pin is brought high.
digital code loaded to the DAC register determines at
which node on the string the voltage is tapped off to
Power Down
be fed into the output amplifier. The voltage is tapped
off by closing one of the switches connecting the
The DAC7552 has a flexible power-down capability
string to the amplifier. Because it is a string of
as described in Table 2. Individual channels could be
resistors, it is specified monotonic. The DAC7552
powered down separately or all channels could be
architecture uses two separate resistor strings to
powered down simultaneously. During a power-down
minimize channel-to-channel crosstalk.
condition, the user has flexibility to select the output
impedance of each channel. During power-down
OUTPUT BUFFER AMPLIFIERS
operation, each channel can have either 1-kΩ,
100-kΩ, or Hi-Z output impedance to ground.
The output amplifier is capable of generating
rail-to-rail voltages on its output, which gives an
output range of 0 V to V
DD
. It is capable of driving a
load of 2 kΩ in parallel with up to 1000 pF to GND.
The source and sink capabilities of the output
amplifier can be seen in the typical curves. The slew
rate is 1.8 V/µs with a typical settling time of 3 µs with
the output unloaded.
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