Datasheet

DAC7551
V
REF
H
DAC7551
_
+
V
dac
R2
R1
REF3140
V
REF
V
tail
V
OUT
OPA4130
V
OUT
+ V
REF
ǒ
R2
R1
) 1
Ǔ
SDIN
4096
*V
tail
ǒ
R2
R1
Ǔ
DAC7551-Q1
www.ti.com SLAS767 –JUNE 2011
APPLICATION INFORMATION
WAVEFORM GENERATION 1MSPS (small-signal) maximum data update rate,
DAC7551-Q1 can support high-speed control loops.
As a result of the exceptional linearity and low glitch
Ultralow glitch energy of the DAC7551-Q1
of the DAC7551-Q1, the device is well-suited for
significantly improves loop stability and loop settling
waveform generation (from DC to 10kHz). The
time.
DAC7551-Q1 large-signal settling time is 5μs,
supporting an update rate of 200kSPS. However, the
GENERATING INDUSTRIAL VOLTAGE
update rates can exceed 1MSPS if the waveform to
RANGES
be generated consists of small voltage steps between
consecutive DAC updates. To obtain a high dynamic
For control loop applications, DAC gain and offset
range, REF3140 (4.096V) or REF02 (5.0V) are
errors are not important parameters. This
recommended for reference voltage generation.
consideration could be exploited to lower trim and
calibration costs in a high-voltage control circuit
GENERATING ±5V, ±10V, AND ±12V design. Using a quad operational amplifier
OUTPUTS FOR PRECISION INDUSTRIAL (OPA4130), and a voltage reference (REF3140), the
CONTROL DAC7551-Q1 can generate the wide voltage swings
required by the control loop.
Industrial control applications can require multiple
feedback loops consisting of sensors, ADCs, MCUs,
DACs, and actuators. Loop accuracy and loop speed
are the two important parameters of such control
loops.
Loop Accuracy
DAC offset, gain, and the integral linearity errors are
not factors in determining the accuracy of the loop.
As long as a voltage exists in the transfer curve of a
monotonic DAC, the loop can find it and settle to it.
On the other hand, DAC resolution and differential
linearity do determine the loop accuracy, because
Figure 28. Low-cost, Wide-swing Voltage
each DAC step determines the minimum incremental
Generator for Control Loop Applications
change the loop can generate. A DNL error less
than –1LSB (non-monotonicity) can create loop
The output voltage of the configuration is given by:
instability. A DNL error greater than +1LSB implies
unnecessarily large voltage steps and missed voltage
targets. With high DNL errors, the loop loses its
(1)
stability, resolution, and accuracy. Offering 12-bit
ensured monotonicity and ±0.08LSB typical DNL Fixed R1 and R2 resistors can be used to coarsely
error, DAC755x devices are great choices for set the gain required in the first term of the equation.
precision control loops. Once R2 and R1 set the gain to include some
minimal over-range, a single DAC7551-Q1 could be
Loop Speed used to set the required offset voltages. Residual
errors are not an issue for loop accuracy because
Many factors determine the control loop speed, such
offset and gain errors could be tolerated. One
as ADC conversion time, MCU speed, and DAC
DAC7551-Q1 can provide the V
tail
voltages, while four
settling time. Typically, the ADC conversion time, and
additional DAC7551-Q1 devices can provide V
dac
the MCU computation time are the two major factors
voltages to generate four high-voltage outputs. A
that dominate the time constant of the loop. DAC
single SPI interface is sufficient to control all five
settling time is rarely a dominant factor because ADC
DAC7551-Q1 devices in a daisy-chain configuration.
conversion times usually exceed DAC conversion
times. DAC offset, gain, and linearity errors can slow For ±5V operation:
the loop down only during the start-up. Once the loop
R1 = 10kΩ, R2 = 15kΩ, V
tail
= 3.33V, V
REF
= 4.096V
reaches its steady-state operation, these errors do
not affect loop speed any further. Depending on the
For ±10V operation:
ringing characteristics of the loop transfer function,
R1 = 10kΩ, R2 = 39kΩ, V
tail
= 2.56V, V
REF
= 4.096V
DAC glitches can also slow the loop down. With its
For ±12V operation:
R1 = 10kΩ, R2 = 49kΩ, V
tail
= 2.45V, V
REF
= 4.096V
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