Datasheet

V
REF
R
R
R
R
ToOutput
Amplifier
R
DIVIDER
V
2
REF
V
OUT
+ AV
DD
D
2
n
REF(+)
ResistorStringDACRegister
GND
Output
Amplifier
V
OUT
AV
DD
DAC5311
DAC6311
DAC7311
www.ti.com SBAS442B –AUGUST 2008–REVISED MAY 2013
THEORY OF OPERATION
DAC SECTION
The DAC5311, DAC6311, and DAC7311 are
fabricated using TI's proprietary HPA07 process
technology. The architecture consists of a string DAC
followed by an output buffer amplifier. Because there
is no reference input pin, the power supply (AV
DD
)
acts as the reference. Figure 77 shows a block
diagram of the DAC architecture.
Figure 77. DACx311 Architecture
The input coding to the DACx311 is straight binary,
so the ideal output voltage is given by:
Where:
n = resolution in bits; either 8 (DAC5311), 10
(DAC6311), or 12 (DAC7311).
D = decimal equivalent of the binary code that is
Figure 78. Resistor String
loaded to the DAC register. It ranges from 0 to
255 for 8-bit DAC5311; from 0 to 1023 for the 10-
bit DAC6311; and 0 to 4095 for the 12-bit
OUTPUT AMPLIFIER
DAC7311.
The output buffer amplifier is capable of generating
RESISTOR STRING
rail-to-rail voltages on its output which gives an output
range of 0V to AV
DD
. It is capable of driving a load of
The resistor string section is shown in Figure 78. It is
2kΩ in parallel with 1000pF to GND. The source and
simply a string of resistors, each of value R. The
sink capabilities of the output amplifier can be seen in
code loaded into the DAC register determines at
the Typical Characteristics section for the given
which node on the string the voltage is tapped off to
voltage input. The slew rate is 0.7V/μs with a half-
be fed into the output amplifier by closing one of the
scale settling time of typically 6μs with the output
switches connecting the string to the amplifier. It is
unloaded.
tested monotonic because it is a string of resistors.
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