Datasheet

9
®
DAC716
Using D/A Converters
The GAIN ADJUST and OFFSET ADJUST circuits of
DAC716 have been arranged so that these points may be
easily driven by external D/A converters. Refer to
Figure 7. 12-bit D/A converters provide a nominal
OFFSET adjust and GAIN adjust resolution of 25µV and
15µV per LSB step, respectively.
Nominal values of GAIN and OFFSET occur when the D/A
converters outputs are at approximately half scale, 0V.
OUTPUT VOLTAGE RANGE CONNECTIONS
The DAC716 output amplifier is connected internally for
10V output range.
DIGITAL INTERFACE
SERIAL INTERFACE
The DAC716 has a serial interface with two data buffers
which can be used for either synchronous or asynchronous
updating of multiple D/A converters. A0 is the enable control
for the Data Input Latch. A1 is the enable for the D/A Latch.
CLK is used to strobe data into the latches enabled by A0 and
A1. A CLR function is also provided and when enabled it sets
both the Data Latch and the D/A Latch to all zeros .
Multiple DAC716s can be connected to the same CLK and
data lines in two ways. The output of the serial loaded data
latch is available as SDO so that any number of DAC716s
can be cascaded on the same input bit stream as shown in
Figure 8 and 9. This configuration allows all D/A converters
to be updated simultaneously and requires a minimum num-
ber of control signal inputs. These configurations do require
16N CLK cycles to load any given D/A converter, where N
is the number of D/A converters.
The DAC716 can also be connected in parallel as shown in
Figure 10. This configuration allows any D/A converter in
the system to be updated in a maximum of 16 CLK cycles.
FIGURE 5. System Ground Considerations for High-Resolution D/A Converters.
R
1
Sense
Output
R
L
R
2
R
3
Alternate Ground
Sense Connection
System Ground
ACOMDCOM
Bus
Interface
DAC716
Analog
Power
Supply
0.01µF
(1)
0.01µF
To +V
CC
To –V
CC
NOTE: (1) Locate close to DAC716 package.
V
OUT
5kΩ9.75kΩ
V
REF
V
REF OUT
Offset Adjust
SDI
A
0
A
1
CLR