Datasheet

12
®
DAC716
FIGURE 9a. Cascaded Serial Bus Connection with Asynchronous Update.
FIGURE 9b. Timing Diagram For Figure 9a.
FEDCBA9876543210FEDCBA9876543210FEDCBA9876543210
Update
DAC 3 DAC 2 DAC 1
Data Latch
Data
SDI
A0
A1
CLK
CLR
DAC716
DAC 1
DAC716
DAC 2
DAC716
DAC 3
SDO
Data
Data Latch
Up Date
4
2
3
1
16
+5V
SDI
A0
A1
CLK
CLR SDO
4
2
3
1
16
+5V
SDI
A0
A1
CLK
CLR SDO
4
2
3
1
16
+5V
5
5
5
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