Datasheet

DAC714
4
SBAS032A
www.ti.com
CLK
A
0
SDI
Serial Data Input
MSB First
Latch Data
In D/A Latch
A
1
t
A
0
H
D
0
D
14
D
15
t
A
1
S
t
A
1
H
t
DH
t
DS
t
A
0
S
t
CLK
t
CH
t
CL
CLK
A
0
SDO
Serial Data
Out
t
A
0
S
t
A
0
H
D
0
D
14
Clear
D
15
t
CLK
t
CH
t
CL
CLR
t
DSOP
t
CP
t
DSOP
TIMING SPECIFICATIONS
T
A
= –40°C to +85°C, +V
CC
= +12V or +15V, –V
CC
= –12V or –15V.
SYMBOL PARAMETER MIN MAX UNITS
t
CLK
Data Clock Period 100 ns
t
CL
Clock LOW 50 ns
t
CH
Clock HIGH 50 ns
t
A0S
Setup Time for A
0
50 ns
t
A1S
Setup Time for A
1
50 ns
t
AOH
Hold Time for A
0
0ns
t
A1H
Hold Time for A
1
0ns
t
DS
Setup Time for DATA 50 ns
t
DH
Hold Time for DATA 10 ns
t
DSOP
Output Propagation Delay 140 ns
t
CP
Clear Pulsewidth 200 ns
A
0
A
1
CLK CLR DESCRIPTION
011 → 0 → 1 1 Shift Serial Data into SDI
101 → 0 → 1 1 Load D/A Latch
111 → 0 → 1 1 No Change
001 → 0 → 1 1 Two Wire Operation
(1)
X X 1 1 No Change
X X X 0 Reset D/A Latch
NOTES: X = Don’t Care. (1) All digital input changes will appear at the
output.
TRUTH TABLE
TIMING DIAGRAMS
Serial Data In
Serial Data Out