Datasheet

DISCUSSION OF SPECIFICATIONS
LINEARITY ERROR TOTAL HARMONIC DISTORTION + NOISE
DIFFERENTIAL LINEARITY ERROR
SIGNAL-TO-NOISE AND DISTORTION RATIO
MONOTONICITY
DIGITAL-TO-ANALOG GLITCH IMPULSE
DIGITAL FEEDTHROUGH
SETTLING TIME
DAC712
www.ti.com ................................................................................................................................................. SBAS023A – SEPTEMBER 2000 – REVISED JULY 2009
Linearity error is defined as the deviation of the Total harmonic distortion + noise is defined as the
analog output from a straight line drawn between the ratio of the square root of the sum of the squares of
end points of the transfer characteristic. the values of the harmonics and noise to the value of
the fundamental frequency. It is expressed in % of
the fundamental frequency amplitude at sampling rate
f
S
.
Differential linearity error (DLE) is the deviation from
1LSB of an output change from one adjacent state to
the next. A DLE specification of ± 1/2LSB means that
(SINAD)
the output step size can range from 1/2LSB to
3/2LSB when the digital input code changes from one SINAD includes all the harmonic and outstanding
code word to the adjacent code word. If the DLE is spurious components in the definition of output noise
more positive than – 1LSB, the D/A converter is said power in addition to quantizing and internal random
to be monotonic. noise power. SINAD is expressed in dB at a specified
input frequency and sampling rate, f
S
.
A D/A converter is monotonic if the output either
increases or remains the same for increasing digital The amount of charge injected into the analog output
input values. Monotonicity of the DAC712 is ensured from the digital inputs when the inputs change state.
over the specified temperature range to 13, 14, 15, It is measured at half-scale at the input codes where
and 16 bits for performance grades DAC712P/U, as many switches as possible change state — from
DAC712PB/UB, DAC712PK/UK, and DAC712PL/UL, 7FFFh to 8000h.
respectively.
When the analog-to-digital (A/D) converter is not
Settling time is the total time (including slew time) for selected, high-frequency logic activity on the digital
the D/A output to settle to within an error band inputs is coupled through the device and shows up as
around its final value after a change in input. Settling output noise. This noise is digital feedthrough.
times are specified to within ± 0.003% of Full-Scale
Range (FSR) for an output step change of 20V and
1LSB. The 1LSB change is measured at the Major
Carry (FFFFh to 0000h, and 0000h to FFFFh: BTC
codes), the input transition at which worst-case
settling time occurs.
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