Datasheet

DAC5578
DAC6578
DAC7578
www.ti.com SBAS496A –MARCH 2010–REVISED AUGUST 2010
PARAMETER DEFINITIONS
With the increased complexity of many different Full-Scale Error
specifications listed in product data sheets, this
Full-scale error is defined as the deviation of the real
section summarizes selected specifications related to
full-scale output voltage from the ideal output voltage
digital-to-analog converters.
while the DAC register is loaded with the full-scale
code (for example, for 12 bit resolution 0xFFF).
STATIC PERFORMANCE
Ideally, the output should be AVDD – 1 LSB. The
full-scale error is expressed in percent of full-scale
Static performance parameters are specifications
range (%FSR).
such as differential nonlinearity (DNL) or integral
nonlinearity (INL). These are dc specifications and
Offset Error
provide information on the accuracy of the DAC. They
The offset error is defined as the difference between
are most important in applications where the signal
actual output voltage and the ideal output voltage in
changes slowly and accuracy is required.
the linear region of the transfer function. This
difference is calculated by using a straight line
Resolution
defined by two codes (for example, for 12 bit
Generally, the DAC resolution can be expressed in
resolution code 30 and 4050). Since the offset error is
different forms. Specifications such as IEC 60748-4
defined by a straight line, it can have a negative or
recognize the numerical, analog, and relative
positive value. Offset error is measured in mV.
resolution. The numerical resolution is defined as the
number of digits in the chosen numbering system
Zero-Code Error
necessary to express the total number of steps of the
The zero-code error is defined as the DAC output
transfer characteristic, where a step represents both
voltage, when all '0's are loaded into the DAC
a digital input code and the corresponding discrete
register. Zero-scale error is a measure of the
analogue output value. The most commonly-used
difference between actual output voltage and ideal
definition of resolution provided in data sheets is the
output voltage (0V). It is expressed in mV. It is
numerical resolution expressed in bits.
primarily caused by offsets in the output amplifier.
Least Significant Bit (LSB)
Gain Error
The least significant bit (LSB) is defined as the
Gain error is defined as the deviation in the slope of
smallest value in a binary coded system. The value of
the real DAC transfer characteristic from the ideal
the LSB can be calculated by dividing the full-scale
transfer function. Gain error is expressed as a
output voltage by 2
n
, where n is the resolution of the
percentage of full-scale range (%FSR).
converter.
Full-Scale Error Drift
Most Significant Bit (MSB)
Full-scale error drift is defined as the change in
The most significant bit (MSB) is defined as the
full-scale error with a change in temperature.
largest value in a binary coded system. The value of
Full-scale error drift is expressed in units of µV/°C.
the MSB can be calculated by dividing the full-scale
Offset Error Drift
output voltage by 2. Its value is one-half of full-scale.
Offset error drift is defined as the change in offset
Relative Accuracy or Integral Nonlinearity (INL)
error with a change in temperature. Offset error drift
Relative accuracy or integral nonlinearity (INL) is
is expressed in µV/°C.
defined as the maximum deviation between the real
Zero-Code Error Drift
transfer function and a straight line passing through
Zero-code error drift is defined as the change in
the endpoints of the ideal DAC transfer function. INL
zero-code error with a change in temperature.
is measured in LSBs.
Zero-code error drift is expressed in µV/°C.
Differential Nonlinearity (DNL)
Gain Temperature Coefficient
Differential nonlinearity (DNL) is defined as the
The gain temperature coefficient is defined as the
maximum deviation of the real LSB step from the
change in gain error with changes in temperature.
ideal 1LSB step. Ideally, any two adjacent digital
The gain temperature coefficient is expressed in ppm
codes correspond to output analog voltages that are
of FSR/°C.
exactly one LSB apart. If the DNL is less than 1LSB,
the DAC is said to be monotonic.
Power-Supply Rejection Ratio (PSRR)
Power-supply rejection ratio (PSRR) is defined as the
empty para to force Full-Scale Error to next col
ratio of change in output voltage to a change in
empty para to force Full-Scale Error to next col
supply voltage for a full-scale output of the DAC. The
PSRR of a device indicates how the output of the
DAC is affected by changes in the supply voltage.
PSRR is measured in decibels (dB).
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