Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- THERMAL INFORMATION
- ELECTRICAL CHARACTERISTICS
- PIN CONFIGURATIONS
- TIMING DIAGRAM
- TIMING REQUIREMENTS
- TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V
- TYPICAL CHARACTERISTICS: DAC AT AVDD = 3.6 V
- TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V
- THEORY OF OPERATION
- DIGITAL-TO-ANALOG CONVERTER (DAC)
- RESISTOR STRING
- OUTPUT AMPLIFIER
- TWO-WIRE, I2C-COMPATIBLE INTERFACE
- DACx578 I2C UPDATE SEQUENCE
- POWER-ON RESET TO ZERO-SCALE OR MIDSCALE
- LDAC FUNCTIONALITY
- POWER-DOWN COMMANDS
- CLEAR CODE REGISTER AND CLR PIN
- SOFTWARE RESET FUNCTION
- OPERATING EXAMPLES: DAC7578
- Example 1: Write Mid Scale to Data Buffer A and Update Channel A Output
- Example 2: Power-Down Channel B, C, and H with Hi-Z Output
- Example 3: Read-back the value of the input register of DAC Channel G
- Example 4: Write multiple bytes of data to Channel F. Write Full Scale and then Quarter Scale to Channel F
- Example 5: Write Mid Scale and then Full Scale to all DAC channels.
- APPLICATION INFORMATION
- PARAMETER DEFINITIONS
- Revision History

DAC5578
DAC6578
DAC7578
SBAS496A –MARCH 2010–REVISED AUGUST 2010
www.ti.com
Most Significant Data Byte (MSDB) and Least I
2
C Read Sequence
Significant Data Byte (LSDB)
To read any register, use the following command
The MSDB and LSDB contain the data that are
sequence:
passed to the register(s) specified by the CA byte, as
1. Send a start or repeated start command with a
shown in Table 7 and Table 8. See Table 14 for a
slave address and the R/W bit set to '0' for
complete list of write sequences and Table 15 for a
writing. The device acknowledges this event.
complete list of read sequences. The DACx578
2. Then send a command byte for the register to be
updates at the falling edge of the acknowledge signal
read. The device acknowledges this event again.
that follows the LSDB[0] bit.
3. Then send a repeated start with the slave
address and the R/W bit set to '1' for reading.
Broadcast Addressing
The device also acknowledges this event.
Broadcast addressing, as shown in Table 9, is also
4. Then the device writes the MSDB of the register.
supported by the DACx578. Broadcast addressing
The master should acknowledge this byte.
can be used for synchronously updating or powering
5. Finally, the device writes out the LSDB.
down multiple DACx578 devices. These devices are
designed to work with each other, and with the
An alternative reading method allows for reading back
DAC7678, to support multichannel synchronous
of the last register written to. The sequence is a
updates. Using the broadcast address command, the
start/repeated start with slave address and the R/W
DACx578 responds regardless of the state of the
bit set to '1', and the two bytes of the last register are
address pins. Note that broadcast addressing is
read out, as shown in Table 13.
supported only in write mode (master writes to the
DACx578). Note that it is not possible to use the broadcast
address for reading.
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