Datasheet

Generate ACKNOWLEDGE
Signal
Acknowledgement
Signal From Slave
SDA
SCL
MSB
P
Sr
Sr
or
P
S
or
Sr
START or
REPEATED START
Condition
Clock Line Held Low While
Interrupts are Serviced
1 2 7 8 9
ACK
1 2 3 - 8 9
ACK
Address
R/W
Recognize START or
REPEATED START
Condition
REPEATED START
STOP
or
Condition
Recognize STOP or
REPEATED START
Condition
DAC5578
DAC6578
DAC7578
SBAS496A –MARCH 2010–REVISED AUGUST 2010 www.ti.com
Figure 116. I
2
C Bus Protocol
Table 1. Update Sequence
MSB ··· LSB MSB ··· LSB MSB ··· LSB MSB ··· LSB
ACK ACK ACK ACK
Address (A) Byte Command/Access Byte MSDB LSDB
DB[32:24] DB[23:16] DB[15:8] DB[7:0]
AV
DD
, GND, or left floating. The device address can
Address (A) Byte
be updated dynamically between serial commands.
When using the QFN package (DAC5578RGE,
The address byte, shown in Table 2, is the first byte
DAC6578RGE, and DAC7578RGE), up to eight
received following the start condition from the master
devices can be connected to the same I
2
C bus. When
device. The first four most significant bits (MSBs) of
using the TSSOP package (DAC5578PW.
the address are factory preset to '1001'. The next
DAC6578PW, and DAC7578PW), up to three devices
three bits of the address are controlled by the ADDR
can be connected to the same I
2
C bus.
pin(s). The ADDR pin(s) inputs can be connected to
Table 2. Address Byte
MSB LSB
AD6 AD5 AD4 AD3 AD2 AD1 AD0 R/W
1 0 0 1 See Table 3 or Table 4 Slave Address column 0 or 1
Table 3. Address Format For QFN-24 (RGE) Package
SLAVE ADDRESS ADDR1 ADDR0
1001 000 0 0
1001 001 0 1
1001 010 1 0
1001 011 1 1
1001 100 Float 0
1001 101 Float 1
1001 110 0 Float
1001 111 1 Float
Not supported Float Float
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