Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- THERMAL INFORMATION
- ELECTRICAL CHARACTERISTICS
- PIN CONFIGURATIONS
- TIMING DIAGRAM
- TIMING REQUIREMENTS
- TYPICAL CHARACTERISTICS: DAC at AVDD = 5.5 V
- TYPICAL CHARACTERISTICS: DAC AT AVDD = 3.6 V
- TYPICAL CHARACTERISTICS: DAC AT AVDD = 2.7 V
- THEORY OF OPERATION
- DIGITAL-TO-ANALOG CONVERTER (DAC)
- RESISTOR STRING
- OUTPUT AMPLIFIER
- TWO-WIRE, I2C-COMPATIBLE INTERFACE
- DACx578 I2C UPDATE SEQUENCE
- POWER-ON RESET TO ZERO-SCALE OR MIDSCALE
- LDAC FUNCTIONALITY
- POWER-DOWN COMMANDS
- CLEAR CODE REGISTER AND CLR PIN
- SOFTWARE RESET FUNCTION
- OPERATING EXAMPLES: DAC7578
- Example 1: Write Mid Scale to Data Buffer A and Update Channel A Output
- Example 2: Power-Down Channel B, C, and H with Hi-Z Output
- Example 3: Read-back the value of the input register of DAC Channel G
- Example 4: Write multiple bytes of data to Channel F. Write Full Scale and then Quarter Scale to Channel F
- Example 5: Write Mid Scale and then Full Scale to all DAC channels.
- APPLICATION INFORMATION
- PARAMETER DEFINITIONS
- Revision History
DAC
Register
REF(+)
Resistor String
REF( )-
V
REFIN
V
OUT
X
178kW
150kW 150kW
V =
OUT
x V
REFIN
D
IN
2
n
V
REF
R
R
R
R
V
REF
2
R
DIVIDER
To Output Amplifier
(2x Gain)
DAC5578
DAC6578
DAC7578
www.ti.com
SBAS496A –MARCH 2010–REVISED AUGUST 2010
THEORY OF OPERATION
DIGITAL-TO-ANALOG CONVERTER (DAC)
The DAC5578, DAC6578, and DAC7578 (DACx578)
architecture consists of eight string DACs each
followed by an output buffer amplifier. Figure 111
shows a principal block diagram of the DAC
architecture.
Figure 111. Device Architecture
For the TSSOP package, the input coding is straight
binary. For the QFN package, the TWOC pin controls
the code format.
When using an external reference, the ideal output
voltage is given by Equation 1:
(1)
Where:
D
IN
= decimal equivalent of the binary code that
is loaded to the DAC register. The code can
range from 0 to 255 for the 8-bit DAC5578, 0 to
Figure 112. Resistor String
1023 (DAC6578) and 0 to 4095 (DAC7578).
V
REFIN
= external reference voltage of 0V to 5V,
supplied at the V
REFIN
pin.
OUTPUT AMPLIFIER
n = resolution on bits; 8 (DAC5578), 10
The output buffer amplifier is capable of generating
(DAC6578), or 12 (DAC7578)
rail-to-rail voltages on its output, giving a maximum
output range of 0V to AV
DD
. It is capable of driving a
RESISTOR STRING
load of 2kΩ in parallel with 1000pF to GND. The
The resistor string circuitry is shown in Figure 112. It
source and sink capabilities of the output amplifier
is a string of resistors, each of value R. The code
can be seen in the Typical Characteristics. The
loaded into the DAC register determines at which
typical slew rate is 0.75V/ms, with a typical full-scale
node on the string the voltage is tapped off to be fed
settling time of 7ms with the output unloaded.
into the output amplifier by closing one of the
switches connecting the string to the amplifier. It is
monotonic because it is a string of resistors. The
overall gain is one and allows the user to provide an
external reference value of 0 to AV
DD
.
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