Datasheet

DAC5668/88/89 Hardware Description
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No VCXO installed. CDCM7005 in buffer mode which requires an input single-ended clock signal to
SMA connector J20.
The DAC outputs are set by default to drive the TRF3703.
The converter is set to operate with internal reference. Jumper J5 EXTLO is installed between pins 1
and 2.
Full-scale output current set to 20 mA through RBIAS resistor R91.
4.1 Jumper Settings
The DAC5668/88/89EVM has onboard jumpers that allow the user to modify the board configuration.
Table 2 explains the functionality of the jumpers.
Table 2. Jumper List
JUMPER LABEL FUNCTION DEFAULT SETTING
CONDITION
SW1 BRD_RESET Resets the DAC and CDCM7005 devices
JP1 REF_CLK Chooses internal 10-MHz ref or external ref Internal Ref Pin 2-3
J1 VCXO_EN VCXO power down Disabled Unpopulated
JP2 VCXOB Chooses internal VCXO or external source External source Pin 2-3
JP3 VCXO Chooses internal VCXO or external source External source Pin 2-3
JP4 CLK1/CLKOUT Selects between CLK1 input to DAC or CLKOUT DAC CLKOUT Pin 2-3
output
JP5 CLK1C/LOCK Selects between CLK1C input to DAC or LOCK LOCK Pin 2-3
indicator DAC output
JP6 VFUSE Factory use only. Connect to 1.8VDD for normal 1.8 VDD Pin 1-2
operation.
J5 EXTLO Internal (GND) or external (3.3V) voltage reference Internal Reference Pin 1-2
CDC_PD Active-low power down of CDCM7005 Active CDCM7005 Pin 2-3
RESET DAC RESET Signal Unpopulated
CLKOUT_EN Active-low enable of CLKOUT signal buffer Enabled Buffer Pin 1-2
SYNC DAC SYNC Signal GND Pin 1-2
TX_ENABLE DAC TX_ENABLE Signal 3.3V Pin 2-3
4.2 Input/Output Connectors
Table 3 lists the input and output connectors on the DAC5668/88/89EVM.
Table 3. Input and Output Connections
REFERENCE LABEL CONNECTOR DESCRIPTION
DESIGNATOR TYPE
J2 34-pin Header A-bus input data to the DAC.
J3 IOUTB1 SMA Optional IOUTB1 output.
J4 IOUTB2 SMA DACB transformer output. Optional IOUTB2 output.
J6 RFOUT SMA RF output from TRF3703.
J7 34-pin Header B-bus input data to the DAC.
J8 IOUTA1 SMA Optional IOUTA1 output.
J9 IOUTA2 SMA DACA transformer output. Optional IOUTA2 output.
J10/J11 +5V Banana Plug +5-V connection pair. Required only for RF measurements.
J12 USB_CONN USB USB connector for software communication.
J13/J14 +1.8V Banana Plug +1.8-V connection pair.
J15/J16 3.3V Banana Plug +3.3-V connection pair.
J17 OUTCLK2 Y3A SMA Optional CDCM7005 clock output.
J18 OUTCLK2 Y4A SMA Optional CDCM7005 clock output.
6
DAC5668/88/89EVM SLAU241AJune 2008Revised March 2010
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