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Y0
Y0
Y0
Y0
Y1
Y1
Y1
Y1
Y2
Y2
Y2
Y2
Y3
Y3
Y3
Y3
CLK1
CLK1
CLK1C
CLK1C
CLK2
CLK2
CLK2C
CLK2C
CLK1
CLK1
CLK1C
CLK1C
CLK2
CLK2
CLK2C
CLK2C
Ref
Ref
B0170-01
f
INPUT
f
INPUT
f
INPUT
f
DAC
f
DAC
f
DAC
f
DAC
f
INPUT
f
INPUT
CDC7005
#1
CDC7005
#2
DAC5687
#1
DAC5687
#3
DAC5687
#2
DAC5687
#4
Reference Operation
DAC Transfer Function
DAC5687
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
Figure 58. Block Diagram for Clock Synchronization of Multiple DAC5687 Devices in Dual-Clock Mode
The DAC5687 comprises a band-gap reference and control amplifier for biasing the full-scale output current. The
full-scale output current is set by applying an external resistor R
BIAS
to pin BIASJ. The bias current IBIAS through
resistor R
BIAS
is defined by the on-chip band-gap reference voltage and control amplifier. The full-scale output
current equals 16 times this bias current. The full-scale output current IOUT
FS
can thus be expressed as:
IOUT
FS
= 16 × I
BIAS
= 16 × V
EXTIO
/ R
BIAS
where V
EXTIO
is the voltage at terminal EXTIO. The band-gap reference voltage delivers an accurate voltage of
1.2 V. This reference is active when terminal EXTLO is connected to AGND. An external decoupling capacitor
C
EXT
of 0.1 µ F should be connected externally to terminal EXTIO for compensation. The band-gap reference can
additionally be used for external reference operation. In that case, an external buffer with high-impedance input
should be applied in order to limit the band-gap load current to a maximum of 100 nA. The internal reference can
be disabled and overridden by an external reference by connecting EXTLO to AVDD. Capacitor C
EXT
may hence
be omitted. Terminal EXTIO thus serves as either input or output node.
The full-scale output current can be adjusted from 20 mA down to 2 mA by varying resistor R
BIAS
or changing the
externally applied reference voltage. The internal control amplifier has a wide input range, supporting the
full-scale output current range of 20 mA.
The CMOS DACs consist of a segmented array of NMOS current sinks, capable of sinking a full-scale output
current up to 20 mA. Differential current switches direct the current of each current source through either one of
the complementary output nodes IOUT1 or IOUT2. Complementary output currents enable differential operation,
thus canceling out common-mode noise sources (digital feedthrough, on-chip and PCB noise), dc offsets,
even-order distortion components, and increasing signal output power by a factor of two.
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