Datasheet

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Register Name: CONFIG2 — Address: 0x03, Default = 0x80
DAC5687
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
input data MSB to LSB order is reversed, DA[15] = LSB and DA[0] = MSB.
rev_bbus: When cleared, DB input data MSB to LSB order is DB[15] = MSB and DB[0] = LSB. When set, DB
input data MSB to LSB order is reversed, DB[15] = LSB and DB[0]= MSB.
fir_bypass: When set, all interpolation filters are bypassed (interp(1:0) setting has no effect). QMC and NCO
blocks are functional in this mode up to f
DAC
= 250 MHz, limited by the input data rate.
full_bypass: When set, all filtering, QMC and NCO functions are bypassed.
BIT 7 BIT 0
nco nco_gain qmc cm_mode(3:0) invsinc
1 0 0 0 0 0 0 0
nco: When set, the NCO is enabled.
nco_gain: When set, the data output of the NCO is increased by 2 × .
qmc: Quadrature modulator gain and phase correction is enabled when set.
cm_mode(3:0): Controls f
DAC
/2 or f
DAC
/4 mixer modes for the coarse mixer block.
Table 3. Coarse Mixer Sequences
cm_mode(3:0) Mixing Mode Sequence
00XX No mixing
0100 f
DAC
/2 DAC A = { – A +A – A +A … }
DAC B = { – B +B – B +B … }
0101 f
DAC
/2 DAC A = { – A +A – A +A … }
DAC B = {+B – B +B – B … }
0110 f
DAC
/2 DAC A = {+A – A +A – A … }
DAC B = { – B +B – B +B … }
0111 f
DAC
/2 DAC A = {+A – A +A – A … }
DAC B = {+B – B +B – B … }
1000 f
DAC
/4 DAC A = {+A – B – A +B … }
DAC B = {+B +A – B – A … }
1001 f
DAC
/4 DAC A = {+A – B – A +B … }
DAC B = { – B – A +B +A … }
1010 f
DAC
/4 DAC A = { – A +B +A – B … }
DAC B = {+B +A – B – A … }
1011 f
DAC
/4 DAC A = { – A +B +A – B … }
DAC B = { – B – A +B +A … }
1100 – f
DAC
/4 DAC A = {+A +B – A – B … }
DAC B = {+B – A – B +A … }
1101 – f
DAC
/4 DAC A = {+A +B – A – B … }
DAC B = { – B +A +B – A … }
1110 – f
DAC
/4 DAC A = { – A – B +A +B … }
DAC B = {+B – A – B +A … }
1111 – f
DAC
/4 DAC A = { – A – B +A +B … }
DAC B = { – B +A +B – A … }
invsinc: Enables the invsinc compensation filter when set.
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