Datasheet

FUNCTIONAL BLOCK DIAGRAM
y2
y2y2y2
y2
y2y2y2
CLK1
CLK1C
LPFPLLLOCK
CLKVDD CLKGND DVDD DGNDPLLVDDPLLGND SLEEP
FIR1 FIR2
sin
AVDD AGND
PHSTR
NCO
cos
RESETB
100-Pin HTQFP
EXTIO
EXTLO
1.2-V
Reference
BIASJ
IOUTA1
IOUTA2
16-Bit
FIR5
IOUTB1
IOUTB2
FIR3
x
sin(x)
TXENABLE
DA[15:0]
DB[15:0]
DEMUX
FIR4
CLK2
CLK2C
SIF
SCLKSDENBSDOSDIO
DAC
16-Bit
DAC
2y–16y f
DATA
Internal Clock Generation
2y–16y PLL Clock Multiplier
x
sin(x)
f
DATA
A Gain
B Gain
A
Offset
B
Offset
B0019-01
QFLAG
IOVDD
IOGND
DAC5686
www.ti.com ............................................................................................................................................................ SLWS147F – APRIL 2003 – REVISED JUNE 2009
Block Diagram of the DAC5686
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