Datasheet
DAC5682Z
www.ti.com
SLLS853E –AUGUST 2007–REVISED AUGUST 2012
Table 10. Digital Self Test (SLFTST) Register Values
REGISTER ADDRESS (hex) VALUE (Binary) VALUE (Hex)
CONFIG1 01 00011000 18
CONFIG2 02 11101010 EA
CONFIG3 03 10110000 B0
STATUS4 04 00000000 00
CONFIG5 05 00000110 06
CONFIG6 06 00001111 0F
CONFIG12 0C 00001010 0A
CONFIG13 0D 01010101 55
CONFIG14
(1)
0E 00001010 0A
CONFIG15 0F 10101010 AA
All others – Default Default
(1) If using a 3-bit SIF interface, the SDO pin can be programmed to report SLFTST_err status via the SDO_fun_sel(2:0) bits. In this case,
set CONFIG14 = ‘10101010’ or AA hex.
REFERENCE OPERATION
The DAC5682Z uses a bandgap reference and control amplifier for biasing the full-scale output current. The full-
scale output current is set by applying an external resistor R
BIAS
to pin BIASJ. The bias current I
BIAS
through
resistor R
BIAS
is defined by the on-chip bandgap reference voltage and control amplifier. The default full-scale
output current equals 16 times this bias current and can thus be expressed as:
IOUT
FS
= 16 × I
BIAS
= 16 × V
EXTIO
/ R
BIAS
Each DAC has a 4-bit independent coarse gain control via DACA_gain(3:0) and DACB_gain(3:0) in the
CONFIG7 register. Using gain control, the IOUTFS can be expressed as:
IOUTA
FS
= (DACA_gain + 1) × I
BIAS
= (DACA_gain + 1) × V
EXTIO
/ R
BIAS
IOUTB
FS
= (DACB_gain + 1) × I
BIAS
= (DACB_gain + 1) × V
EXTIO
/ R
BIAS
where V
EXTIO
is the voltage at terminal EXTIO. The bandgap reference voltage delivers an accurate voltage of
1.2 V. This reference is active when terminal EXTLO is connected to AGND. An external decoupling capacitor
C
EXT
of 0.1 μF should be connected externally to terminal EXTIO for compensation. The bandgap reference can
additionally be used for external reference operation. In that case, an external buffer with high impedance input
should be applied in order to limit the bandgap load current to a maximum of 100 nA. The internal reference can
be disabled and overridden by an external reference by connecting EXTLO to AVDD. Capacitor CEXT may
hence be omitted. Terminal EXTIO thus serves as either input or output node.
The full-scale output current can be adjusted from 20 mA down to 2 mA by varying resistor R
BIAS
or changing the
externally applied reference voltage. The internal control amplifier has a wide input range, supporting the full-
scale output current range of 20 dB.
DAC TRANSFER FUNCTION
The CMOS DAC’s consist of a segmented array of NMOS current sinks, capable of sinking a full-scale output
current up to 20 mA. Differential current switches direct the current to either one of the complementary output
nodes IOUT1 or IOUT2. (DACA = IOUTA1 or IOUTA2 and DACB = IOUTB1 or IOUTB2.) Complementary output
currents enable differential operation, thus canceling out common mode noise sources (digital feed-through, on-
chip and PCB noise), dc offsets, even order distortion components, and increasing signal output power by a
factor of two.
The full-scale output current is set using external resistor R
BIAS
in combination with an on-chip bandgap voltage
reference source (+1.2 V) and control amplifier. Current I
BIAS
through resistor R
BIAS
is mirrored internally to
provide a maximum full-scale output current equal to 16 times I
BIAS
.
The relation between IOUT1 and IOUT2 can be expressed as:
IOUT1 = – IOUT
FS
– IOUT2
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