Datasheet

DAC5672
SLAS440C –NOVEMBER 2004–REVISED DECEMBER 2010 www.ti.com
ABSOLUTE MAXIMUM RATINGS
over T
A
(unless otherwise noted)
(1)
UNIT
AVDD
(2)
-0.5 V to 4 V
Supply voltage range
DVDD
(3)
-0.5 V to 4 V
Voltage between AGND and DGND -0.5 V to 0.5 V
Voltage between AVDD and DVDD -0.5 V to 0.5 V
DA[13:0] and DB[13:0]
(3)
-0.5 V to DVDD + 0.5 V
MODE, SLEEP, CLKA, CLKB, WRTA, WRTB
(3)
-0.5 V to DVDD + 0.5 V
Supply voltage range
IOUTA1, IOUTA2, IOUTB1, IOUTB2
(2)
-1 V to AVDD + 0.5 V
EXTIO, BIASJ_A, BIASJ_B, GSET
(2)
-0.5 V to AVDD + 0.5 V
Peak input current (any input) +20 mA
Peak total input current (all inputs) -30 mA
Operating free-air temperature range -40 °C to 85 °C
Storage temperature range -65 °C to 150 °C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Measured with respect to AGND.
(3) Measured with respect to DGND.
ELECTRICAL CHARACTERISTICS
over T
A
, AVDD = DVDD = 3.3 V, I
OUTFS
= 20 mA, independent gain set mode (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC Specifications
Resolution 14 Bits
DC Accuracy
(1)
INL Integral nonlinearity -4 ±1.1 4 LSB
1 LSB = I
OUTFS
/2
14
, T
MIN
to T
MAX
DNL Differential nonlinearity -3 ±0.75 3 LSB
Analog Output
Offset error Midscale value ±0.03 %FSR
Offset mismatch Midscale value ±0.03 %FSR
With external reference ±0.25 %FSR
Gain error
With internal reference ±0.25 %FSR
Minimum full-scale output current
(2)
2 mA
Maximum full-scale output current
(2)
20 mA
With external reference -2 0.2 2 %FSR
Gain mismatch
With internal reference -2 0.2 2 %FSR
Output voltage compliance range
(3)
-1 1.25 V
R
O
Output resistance 300 kΩ
C
O
Output capacitance 5 pF
Reference Output
Reference voltage 1.14 1.2 1.26 V
Reference output current
(4)
100 nA
Reference Input
V
EXTIO
Input voltage 0.1 1.25 V
(1) Measured differentially through 50 Ω to AGND.
(2) Nominal full-scale current, I
OUTFS
, equals 32x the I
BIAS
current.
(3) The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown,
resulting in reduced reliability of the DAC5672 device. The upper limit of the output compliance is determined by the load resistors and
full-scale output current. Exceeding the upper limit adversely affects distortion performance and integral nonlinearity.
(4) Use an external buffer amplifier with high-impedance input to drive any external load.
4 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated
Product Folder Link(s): DAC5672