Datasheet
ELECTRICAL CHARACTERISTICS
DAC5662
SLAS425B – JULY 2004 – REVISED MAY 2007 ................................................................................................................................................................
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over operating free-air temperature range, AVDD = DVDD = 3.3 V, IOUTFS = 20 mA, independent gain set mode (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC Specifications
Resolution 12 Bits
DC Accuracy
(1)
INL Integral nonlinearity -2 0.3 2 LSB
1 LSB = IOUT
FS
/2
12
, T
A
= 25 ° C
DNL Differential nonlinearity -2 0.2 2 LSB
Analog Output
Offset error 0.03 %FSR
With external reference ± 0.25 %FSR
Gain error
With internal reference 0.5 %FSR
Minimum full-scale output current
(2)
2 mA
Maximum full-scale output current
(2)
20 mA
Gain mismatch With internal reference -2 0.07 +2 %FSR
Output voltage compliance range
(3)
-1 1.25 V
R
O
Output resistance 300 k Ω
C
O
Output capacitance 5 pF
Reference Output
Reference voltage 1.14 1.2 1.26 V
Reference output current
(4)
100 nA
Reference Input
V
EXTIO
Input voltage 0.1 1.25 V
R
I
Input resistance 1 M Ω
Small signal bandwidth 300 kHz
C
I
Input capacitance 100 pF
Temperature Coefficients
ppm of
Offset drift 0
FSR/ ° C
ppm of
With external reference 50
FSR/ ° C
Gain drift
ppm of
With internal reference 50
FSR/ ° C
Reference voltage drift 20 ppm/ ° C
(1) Measured differentially through 50 Ω to AGND.
(2) Nominal full-scale current, IOUTFS, equals 32x the IBIAS current.
(3) The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown,
resulting in reduced reliability of the DAC5662 device. The upper limit of the output compliance is determined by the load resistors and
full-scale output current. Exceeding the upper limit adversely affects distortion performance and intergral nonlinearity.
(4) Use an external buffer amplifier with high impedance input to drive any external load.
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