Datasheet

C Data In
A Data In
D Data In
B Data In
C Data Out
A Data Out
D Data Out
B Data Out
13
13
13
13
16
16
16
16
16
16
16
16
qmc_offsetC
{–4096, –4095, ..., 4095}
qmc_offsetA
{–4096, –4095, ..., 4095}
qmc_offsetD
{–4096, –4095, ..., 4095}
qmc_offsetB
{–4096, –4095, ..., 4095}
B0165-03
Σ
Σ
Σ
Σ
DAC3484
SLAS749C –MARCH 2011–REVISED AUGUST 2012 www.ti.com
Figure 78. Digital Offset Block Diagram
GROUP DELAY CORRECTION
A complex transmitter system typically is consisted of a DAC, reconstruction filter network, and I/Q modulator.
Besides the gain and phase mismatch contribution, there could also be timing mismatch contribution from each
components. For instance, the timing mismatch could come from the PCB trace length variation between the I
and Q channels and the group delay variation from the reconstruction filter.
This timing mismatch in the complex transmitter system creates phase mismatch that varies linearly with respect
to frequency. To compensate for the I/Q imbalances due to this mismatch, the DAC3482 has group delay
correction block for each DAC channel. Each DAC channel can adjust its delay through grp_delayA(7:0),
grp_delayB(7:0), grp_delayC(7:0), and grp_delayD(7:0) in register config46 and config47. The group delay
correction, along with gain/phase correction, can be useful for correcting imbalances in wide-band transmitter
system. The maximum delay ranges from 30ps to 100ps and is dependent on DAC sample clock. Contact TI for
specific application information.
TEMPERATURE SENSOR
The DAC3484 incorporates a temperature sensor block which monitors the temperature by measuring the
voltage across 2 transistors. The voltage is converted to an 8-bit digital word using a successive-approximation
(SAR) analog to digital conversion process. The result is scaled, limited and formatted as a twos complement
value representing the temperature in degrees Celsius.
66 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated
Product Folder Links: DAC3484