Datasheet

GND
GND
GND
SLEEP
GND
OS
TRN
N/C
N/C
SYNCN
D15N
D14N
D13N
D12N
TEST
MODE
OS
TRP
GND
DAC
CLKP
DAC
CLKN
GND
N/C
N/C
SYNCP
D15P
D14P
D13P
D12P
GND
IOUT
AP
IOUT
AN
GND
IOUT
BN
IOUT
BP
GND GND
IOUT
CP
IOUT
CN
GND
IOUT
DN
IOUT
DP
GND
GND GND GND GND GND GND GND GND GND GND GND GND
PLL
AVDD
LPF GND GND
EXTIO
BIASJ GND
N/C GND ALARM
SDO
AVDD AVDD AVDD AVDD AVDD AVDD
N/C
RESET
B
SDENBAVDD
DAC
VDD
DAC
VDD
DAC
VDD
DAC
VDD
DAC
VDD
DAC
VDD
AVDD GND
TX
ENABLE
SCLK
DAC
VDD
DAC
VDD
GND GND GND
DAC
VDD
DAC
VDD
GND
PLL
AVDD
N/C
GND
GND GND
GND
N/C
SDIO
GND GND GND GND GND GND GND GND GND
VFUSE
DIG
VDD
GND GND GND
DIG
VDD
N/C GNDGND GND
GND N/C N/C
N/C N/C
GND
IO
VDD
DIG
VDD
GND GNDGND GND
DIG
VDD
IO
VDD
GND N/C N/C
GND
IO
VDD
DIG
VDD
DIG
VDD
IO
VDD
IO
VDD
DIG
VDD
DIG
VDD
IO
VDD
GND
PARITY
P
PARITY
N
N/C N/C
N/C N/C
D11P
D10P
D11N
D10N
N/C N/C
N/C N/C
D9P D8P
D9N D8N
N/C
N/C
N/C
N/C
N/C N/C
N/C N/C
D7P
D6P
D7N
D6N
N/C N/C
N/C N/C
D5P
D4P
D5N
D4N
D0P D0N
D1P D1N
D2P D2N
D3P D3N
DATA
CLKP
DATA
CLKN
FRAME
P
FRAME
N
A B
C
D E F
G
H
J
K L M N P
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ZAY Package
(Top View)
DAC Output
Clock Input
Sync/Parity Input
Data Input
CMOS Pins
N/C
3.3V Supply
Ground
P0134-02
CLK
VDD
1.2V Supply
(except for IOVDD2)
DAC3484
SLAS749C MARCH 2011REVISED AUGUST 2012
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6 Copyright © 2011–2012, Texas Instruments Incorporated