Datasheet

DAC3484
SLAS749C –MARCH 2011–REVISED AUGUST 2012 www.ti.com
Register name: config30 – Address: 0x1E, Default: 0x1111
Register
Default
Address Bit Name Function
Value
Name
config30 0x1E 15:12 syncsel_qmoffsetAB(3:0) Selects the syncing source(s) of the AB data path double buffered QMC offset 0001
registers. A ‘1’ in the bit enables the signal as a sync source. More than one sync
source is permitted.
MM Bit 15: sif_sync (via config31)
MM Bit 14: SYNC
MM Bit 13: OSTR
MM Bit 12: Auto-sync from register write
11:8 syncsel_ qmoffsetCD(3:0) Selects the syncing source(s) of the CD data path double buffered QMC offset 0001
registers. A ‘1’ in the bit enables the signal as a sync source. More than one sync
source is permitted.
MM Bit 11: sif_sync (via config31)
MM Bit 10: SYNC
MM Bit 9: OSTR
MM Bit 8: Auto-sync from register write
7:4 syncsel_ qmccorrAB(3:0) Selects the syncing source(s) of the AB data path double buffered QMC 0001
correction registers. A ‘1’ in the bit enables the signal as a sync source. More
than one sync source is permitted.
MM Bit 7: sif_sync (via config31)
MM Bit 6: SYNC
MM Bit 5: OSTR
MM Bit 4: Auto-sync from register write
3:0 syncsel_ qmccorrCD(3:0) Selects the syncing source(s) of the CD data path double buffered QMC 0001
correction registers. A ‘1’ in the bit enables the signal as a sync source. More
than one sync source is permitted.
MM Bit 3: sif_sync (via config31)
MM Bit 2: SYNC
MM Bit 1: OSTR
MM Bit 0: Auto-sync from register write
Register name: config31 – Address: 0x1F, Default: 0x1140
Register
Default
Address Bit Name Function
Value
Name
config31 0x1F 15:12 syncsel_mixerAB(3:0) Selects the syncing source(s) of the AB data path double buffered mixer 0001
registers. A ‘1’ in the bit enables the signal as a sync source. More than one
sync source is permitted.
MM Bit 15: sif_sync (via config31)
MM Bit 14: SYNC
MM Bit 13: OSTR
MM Bit 12: Auto-sync from register write
11:8 syncsel_ mixerCD(3:0) Selects the syncing source(s) of the CD data path double buffered mixer 0001
registers. A ‘1’ in the bit enables the signal as a sync source. More than one
sync source is permitted.
MM Bit 11: sif_sync (via config31)
MM Bit 10: SYNC
MM Bit 9: OSTR
MM Bit 8: Auto-sync from register write
7:4 syncsel_nco(3:0) Selects the syncing source(s) of the two NCO accumulators. A ‘1’ in the bit 0100
enables the signal as a sync source. More than one sync source is permitted.
MM Bit 7: sif_sync (via config31)
MM Bit 6: SYNC
MM Bit 5: OSTR
MM Bit 4: FRAME
3:2 syncsel_dataformatter(1: Selects the syncing source of the data formatter. Unlike the other syncs only 00
0) one sync source is allowed.
MM 00: FRAME
MM 01: SYNC
MM 10: No sync
MM 11: No sync
1 sif_sync SIF created sync signal. Set to ‘1’ to cause a sync and then clear to ‘0’ to 0
remove it.
0 Reserved Reserved for factory use. 0
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