Datasheet
DAC3484
SLAS749C –MARCH 2011–REVISED AUGUST 2012
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Register name: config16 – Address: 0x10, Default: 0x0000 (CAUSES AUTO-SYNC)
Register
Default
Address Bit Name Function
Value
Name
config16 0x10 15 Reserved Reserved for factory use. 0
14 Reserved Reserved for factory use. 0
13:12 dual_ena (1:0) To enable the dual channel mode, set Config1, bit <8> to "0" and Config16, 0
bit<13:12> to "11". This dual channel mode is functionally equivalent to the dual
channel DAC3482 (channels B and C active). See the DAC3482 SLAS748 datasheet
for details.
11:0 qmc_phaseAB(11:0) QMC correction phase for the AB data path. The 12-bit qmc_phaseAB(11:0) word is All zeros
formatted as two’s complement and scaled to occupy a range of –0.5 to 0.49975 and
a default phase correction of 0.00. To accomplish QMC phase correction, this value
is multiplied by the current B sample, then summed into the A sample. If enabled in
config30 writing to this register causes an auto-sync to be generated. This
loads the values of the QMC offset registers (config12, config13, and config16)
into the QMC block at the same time. When updating the QMC values for the
AB channel config16 should be written last. Programming config12 and
config13 will not affect the QMC settings.
Register name: config17 – Address: 0x11, Default: 0x0000 (CAUSES AUTO-SYNC)
Register
Default
Address Bit Name Function
Value
Name
config17 0x11 15 Reserved Reserved for factory use. 0
14 Reserved Reserved for factory use. 0
13 Reserved Reserved for factory use. 0
12 Reserved Reserved for factory use. 0
11:0 qmc_phaseCD(11:0) QMC correction phase for the CD data path. The 12-bit qmc_phaseCD(11:0) word All zeros
is formatted as two’s complement and scaled to occupy a range of –0.5 to 0.49975
and a default phase correction of 0.00. To accomplish QMC phase correction, this
value is multiplied by the current D sample, then summed into the C sample. If
enabled in config30 writing to this register causes an auto-sync to be
generated. This loads the values of the CD-channel QMC block registers
(config14, config15, and config17) into the QMC block at the same time. When
updating the QMC values for the CD-channel config17 should be written last.
Programming config14 and config15 will not affect the QMC settings.
Register name: config18 – Address: 0x12, Default: 0x0000 (CAUSES AUTO-SYNC)
Register
Default
Address Bit Name Function
Value
Name
config18 0x12 15:0 phase_offsetAB(15:0) Phase offset added to the AB data path NCO accumulator before the generation of 0x0000
the SIN and COS values. The phase offset is added to the upper 16 bits of the NCO
accumulator results and these 16 bits are used in the sin/cos lookup tables. If
enabled in config31 writing to this register causes an auto-sync to be
generated. This loads the values of the fine mixer block registers (config18,
config20, and config21) at the same time. When updating the mixer values the
config18 should be written last. Programming config20 and config21 will not
affect the mixer settings.
Register name: config19 – Address: 0x13, Default: 0x0000 (CAUSES AUTO-SYNC)
Register
Default
Address Bit Name Function
Value
Name
config19 0x13 15:0 phase_ offsetCD(15:0) Phase offset added to the CD data path NCO accumulator before the generation of 0x0000
the SIN and COS values. The phase offset is added to the upper 16 bits of the NCO
accumulator results and these 16 bits are used in the sin/cos lookup tables. If
enabled in config31 writing to this register causes an auto-sync to be
generated. This loads the values of the CD-channel fine mixer block registers
(config19, config22 and config23) at the same time. When updating the mixer
values for the CD-channel config19 should be written last. Programming
config22 and config23 will not affect the mixer settings.
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