Datasheet
DAC3484
SLAS749C –MARCH 2011–REVISED AUGUST 2012
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Register name: config7 – Address: 0x07, Default: 0xFFFF
Register Default
Address Bit Name Function
Name Value
config7 0x07 15:0 alarms_mask(15:0) These bits control the masking of the alarms. (0=not masked, 1= masked) 0xFFFF
alarm_mask Alarm that is Masked
15 alarm_from_zerochk
14 not used
13 alarm_fifo_collision
12 alarm_fifo_1away
11 alarm_fifo_2away
10 alarm_dacclk_gone
9 alarm_dataclk_gone
8 alarm_output_gone
7 alarm_from_iotest
6 not used
5 alarm_from_pll
4 alarm_rparity
3 alarm_lparity
2 alarm_frame_parity
1 not used
0 not used
Register name: config8 – Address: 0x08, Default: 0x0000 (CAUSES AUTO-SYNC)
Register
Default
Address Bit Name Function
Value
Name
config8 0x08 15 Reserved Reserved for factory use. 0
14 Reserved Reserved for factory use. 0
13 Reserved Reserved for factory use. 0
12:0 qmc_offsetA(12:0) DACA offset correction. The offset is measured in DAC LSBs. If enabled in config30 All zeros
writing to this register causes an auto-sync to be generated. This loads the values of
the QMC offset registers (config8-config9) into the offset block at the same time.
When updating the offset values for AB channel config8 should be written last.
Programming config9 will not affect the offset setting.
Register name: config9 – Address: 0x09, Default: 0x8000
Register
Default
Address Bit Name Function
Value
Name
config9 0x09 15:13 fifo_offset(2:0) When the sync to the FIFO occurs, this is the value loaded into the FIFO read pointer. With 100
this value the initial difference between write and read pointers can be controlled. This may
be helpful in syncing multiple chips or controlling the delay through the device.
12:0 qmc_offsetB(12:0) DACB offset correction. The offset is measured in DAC LSBs. All zeros
Register name: config10 – Address: 0x0A, Default: 0x0000 (CAUSES AUTO-SYNC)
Register
Default
Address Bit Name Function
Value
Name
config10 0x0A 15 Reserved Reserved for factory use. 0
14 Reserved Reserved for factory use. 0
13 Reserved Reserved for factory use. 0
12:0 qmc_offsetC(12:0) DACC offset correction. The offset is measured in DAC LSBs. If enabled in config30 All zeros
writing to this register causes an auto-sync to be generated. This loads the values of
the CD-channel QMC offset registers (config10-config11) into the offset block at the
same time. When updating the offset values for the CD-channel config10 should be
written last. Programming config11 will not affect the offset setting.
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