Datasheet
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
C1
C2
C3
C4
OSTRN
OSTRP
SYNCP
CLKVDD
DACCLKN
DACCLKP
VFUSE
PLLAVDD
LPF
D15N
D15P
D13P
DIGVDD
D14N
D14P
IOVDD
DIGVDD
SYNCN
D12N
D12P
D13N
D9P
D10N
DATACLKP
D8N
D8P
D9N
D10P
D11N
D11P
D7P
FRAMEN
D5P
D6N
D6P
D7N
FRAMEP
IOVDD
DATACLKN
D4N
D4P
D5N
SCLK
ALARM
PARITYN
SDO
SDIO
SDENB
TXENABLE
RESETB
BIASJ
D0P
D0N
D2N
DIGVDD
D1P
D1N
IOVDD
DIGVDD
PARITYP
D3P
D3N
D2P
AVDD
IOUTAP
AVDD
IOUTBN
AVDD
IOUTAN
DACVDD
SLEEP
TESTMODE
IOUTCN
AVDD
IOUTDP
AVDD
IOUTDN
AVDD
IOUTCP
DACVDD
IOUTBP
EXTIO
AVDD
DACVDD
DAC3484
88-WQFN 9mm x 9mm
RKD Package
(Top View)
P0133-02
DAC3484
www.ti.com
SLAS749C –MARCH 2011–REVISED AUGUST 2012
DEVICE INFORMATION
PIN FUNCTIONS
PIN
I/O DESCRIPTION
NAME NO.
A36, A37,
A38, A40,
AVDD I Analog supply voltage. (3.3 V)
A41, A42,
B31
CMOS output for ALARM condition. The ALARM output functionality is defined through the config7
ALARM B29 O register. Default polarity is active high, but can be changed to active low via config0 alarm_out_pol
control bit.
Full-scale output current bias. For 30mA full-scale output current, connect 1.28kΩ to ground. Change
BIASJ A33 O
the full-scale output current through coarse_dac(3:0) in config3, bit<15:12>
Internal clock buffer supply voltage. (1.2 V)
CLKVDD A4 I
It is recommended to isolate this supply from DIGVDD and DACVDD.
Copyright © 2011–2012, Texas Instruments Incorporated 3