Datasheet

DAC3152
DAC3162
www.ti.com SLAS736D –NOVEMBER 2010–REVISED AUGUST 2012
REVISION HISTORY
Changes from Original (November 2010) to Revision A Page
• Deleted the DAC3172 device ............................................................................................................................................... 1
Changes from Revision A (November 2010) to Revision B Page
• Changed Feature bullet From: High DC Accuracy: ±1 LSB DNL, ±2 LSB INL To: High DC Accuracy: ±0.25 LSB DNL
(10-bit), ± 0.5 LSB INL (12-bit) ............................................................................................................................................. 1
• Added text "The LVPECL clock signal should be AC coupled" to Pin DACCLKP and DACCLKN descriptions. ................. 2
• Added text "The LVPECL clock signal should be AC coupled" to Pin DACCLKP and DACCLKN descriptions. ................. 3
• Added values to the Thermal Information table .................................................................................................................... 4
• Changed the ELECTRICAL CHARACTERISTICS – DC SPECIFICATION table ................................................................ 5
• Added Min and Max values to V
COM
- Internal common mode ............................................................................................. 6
• Added Min and Max values to Z
T
- Internal termination ....................................................................................................... 6
• Changed the AC Performance Typical values for DAC3152 and DAC3162 ........................................................................ 7
• Added the Typical Characteristics section ............................................................................................................................ 8
• Replaced Signal to Noise Ratio (SNR) with Noise Spectral Density (NSD) ....................................................................... 22
Changes from Revision B (December 2011) to Revision C Page
• Changed the CLOCK INPUT: DACCLKP/N - Differential voltage MIN value From: 0.4V To: 0.2V for both devices .......... 6
• Deleted Note 2 From the DIGITAL SPECIFICATIONS table- Driving the clock input with a differential voltage lower
than 1 V results in degraded performance. .......................................................................................................................... 6
Changes from Revision C (February 2012) to Revision D Page
• Added Figure 31 ................................................................................................................................................................. 12
• Changed Figure 34 ............................................................................................................................................................. 15
• Added Figure 35 ................................................................................................................................................................. 15
• Moved the DEFINITION OF SPECIFICATIONS to the end of the data sheet ................................................................... 22
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Product Folder Links: DAC3152 DAC3162