Datasheet

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SBAS279D − AUGUST 2003 − REVISED JULY 2005
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3
ELECTRICAL CHARACTERISTICS: I-DAC
At T
A
= T
MIN
to T
MAX
(typical values are at T
A
= 25°C), +V
A
= +3V, +V
D
= +3V, Update Rate = 40MSPS, I
OUTFS
= 2mA, R
L
= 250Ω, C
L
≤ 10pF,
GSET = H, and internal reference, unless otherwise noted.
DAC2932
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Resolution 12 Bits
Output update rate (f
CLOCK
) 40 MSPS
Specified temperature range, operating Ambient, T
A
−40 +85 °C
Static Accuracy
(1)(2)
Differential nonlinearity (DNL) −3.5 ±0.5 +3.5 LSB
Integral nonlinearity (INL) −8 ±1.5 +8 LSB
Dynamic Performance
(3)
Spurious-free dynamic range (SFDR) To Nyquist, 0dBFS
f
OUT
= 0.2MHz, f
CLOCK
= 20MSPS 68 dBc
f
OUT
= 0.55MHz, f
CLOCK
= 40MSPS 71 dBc
f
OUT
= 1MHz, f
CLOCK
= 25MSPS
(4)
58 70 dBc
f
OUT
= 2.2MHz, f
CLOCK
= 40MSPS 72 dBc
f
OUT
= 5MHz, f
CLOCK
= 40MSPS 75 dBc
f
OUT
= 10MHz, f
CLOCK
= 40MSPS 69 dBc
f
OUT
= 20MHz, f
CLOCK
= 40MSPS 57 dBc
Spurious-free dynamic range within a
window
f
OUT
= 2.2MHz, f
CLOCK
= 40MSPS 1MHz span 76 dBc
f
OUT
= 10MHz, f
CLOCK
= 40MSPS 2MHz span 74 dBc
Total harmonic distortion (THD)
f
OUT
= 0.55MHz, f
CLOCK
= 40MSPS −70 dBc
f
OUT
= 1MHz, f
CLOCK
= 25MSPS
(4)
−58 −69 dBc
f
OUT
= 2.2MHz, f
CLOCK
= 40MSPS −70 dBc
Signal-to-noise and distortion (SINAD)
f
OUT
= 1MHz, f
CLOCK
= 25MSPS
(4)
52 61 dBc
Output settling time
(1)
to 0.1% 20 ns
Output rise time
(1)
10% to 90% 7.7 ns
Output fall time
(1)
10% to 90% 7.4 ns
DC Accuracy
Full-scale output range
(5)(6)
(FSR) All bits high, I
OUT1
, I
OUT2
0.5 2 mA
Output compliance range
(7)
, V
CO
−0.5 +0.5 +0.8 V
Gain error (Full-Scale) −2 ±0.5 +2 %FSR
Gain error drift 70 ppmFSR/°C
Gain matching −2.5 +0.6 +2.5 %FSR
Offset error ±0.001 %FSR
Power-supply rejection, +V
A
+3V, ±10%, at 25°C −0.9 +0.5 +0.9 %FSR/V
Power-supply rejection, +V
D
+3V, ±10%, at 25°C −0.12 +0.03 +0.12 %FSR/V
Output resistance 200 kΩ
Output capacitance I
OUT
, I
OUT
to Ground 5 pF
(1)
At output I
OUT1
, I
OUT2
, while driving a 250Ω load, transition from 000h to FFFh.
(2)
Measured at f
CLOCK
= 25MSPS and f
OUT
= 1.0MHz.
(3)
Differential, transformer (n = 4:1) coupled output, R
L
= 400Ω.
(4)
Differential outputs with a 250Ω load.
(5)
Nominal full−scale output current is I
OUTFS
+ 32 I
REF
+ 32
V
REF
R
SET
; with V
REF
+ 1.22V (typ) and R
SET
+ 19.6kW (1%)
(6)
Ensured by design and characterization; not production tested.
(7)
Gain error to remain ≤10% FSR over the full compliance range.
(8)
Combined power dissipation of I-DAC and V-DAC.