Datasheet

DAC2902
9
SBAS167C
www.ti.com
FIGURE 1. Block Diagram of the DAC2902.
APPLICATION INFORMATION
THEORY OF OPERATION
The architecture of the DAC2902 uses the current steering
technique to enable fast switching and a high update rate.
The core element within the monolithic DAC is an array of
segmented current sources that are designed to deliver a full-
scale output current of up to 20mA, as shown in Figure 1. An
internal decoder addresses the differential current switches
each time the DAC is updated and a corresponding output
current is formed by steering all currents to either output
summing node, I
OUT
or I
OUT
. The complementary outputs
deliver a differential output signal, which improves the
dynamic performance through reduction of even-order har-
monics, common-mode signals (noise), and double the peak-
to-peak output signal swing by a factor of two, compared to
single-ended operation.
The segmented architecture results in a significant reduction
of the glitch energy, improves the dynamic performance
(SFDR), and DNL. The current outputs maintain a very high
output impedance of greater than 200kΩ.
The full-scale output current is determined by the ratio of the
internal reference voltage (approx. +1.25V) and an external
resistor, R
SET
. The resulting I
REF
is internally multiplied by a
factor of 32 to produce an effective DAC output current that
can range from 2mA to 20mA, depending on the value of R
SET
.
The DAC2902 is split into a digital and an analog portion,
each of which is powered through its own supply pin. The
digital section includes edge-triggered input latches and the
decoder logic, while the analog section consists of the
current source array with its associated switches, and the
reference circuitry.
DAC TRANSFER FUNCTION
Each of the DACs in the DAC2902 has a complementary
current output, I
OUT
1 and I
OUT
2. The full-scale output cur-
rent, I
OUTFS
, is the summation of the two complementary
output currents:
I
OUTFS
= I
OUT
+ I
OUT
(1)
The individual output currents depend on the DAC code and
can be expressed as:
I
OUT
= I
OUTFS
× (Code/4096) (2)
I
OUT
= I
OUTFS
× (4095 - Code) (3)
where Code is the decimal representation of the DAC data
input word. Additionally, I
OUTFS
is a function of the refer-
ence current I
REF
, which is determined by the reference
voltage and the external setting resistor, R
SET
.
I
OUTFS
= 32 × I
REF
= 32 × V
REF
/R
SET
(4)
In most cases the complementary outputs will drive resistive
loads or a terminated transformer. A signal voltage will
develop at each output according to:
V
OUT
= I
OUT
× R
LOAD
(5)
V
OUT
= I
OUT
× R
LOAD
(6)
DAC
Latch 1
WRT1
CLK1
CLK2
WRT2
Data Input
Port 2
D[11:0]_2
Data Input
Port 1
D[11:0]_1
l
OUT
1
Input
Latch 1
Reference
Control Amplifier
FSA2
REF
IN
FSA1
GSET
PD
DAC1
Segmented Switches
Current Sources
DAC2902
l
OUT
2
+V
A
+V
D
+V
D
DAC
Latch 2
Input
Latch 2
DAC2
Segmented Switches
Current Sources
AGNDDGNDDGND
l
OUT
1
l
OUT
2