Datasheet

DAC161S055

SNAS503B –NOVEMBER 2010–REVISED JANUARY 2012

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LAYOUT, GROUNDING AND BYPASSING

For best accuracy and minimum noise, the printed circuit board containing the DAC should have separate analog

and digital areas. These areas are defined by the locations of the analog and digital power planes. Both power

planes should be in the same board layer. There should be a single ground plane. Frequently a single ground

plane design will utilize a fencing technique to prevent the mixing of analog and digital ground currents. Separate

ground planes should only be used if the fencing technique proves inadequate. The separate ground planes

must be connected in a single place, preferably near the DAC. Special care is required to specify that digital

signals with fast edge rates do not pass over split ground planes. The fast digital signals must always have a

continuous return path below their traces.

When possible, the DAC power supply should be bypassed with a 10µF and a 0.1µF capacitor placed as close

as possible to the device with the 0.1µF closest to the supply pin. The 10µF capacitor should be a tantalum type

and the 0.1µF capacitor should be a low ESL, low ESR type. Sometime, the loading requirements of the

regulator driving the DAC do not allow such capacitance to be placed on the regulator output. In those cases,

bypass should be as large as allowed by the regulator using a low ESL, low ESR capacitance. In the LM4120

example above, the supply is bypassed with 0.022µF ceramic capacitors. The DAC should be fed with power

that is only used for analog circuits.

Avoid crossing analog and digital signals and keep the clock and data lines on the component side of the board.

The clock and data lines should have controlled impedances.

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