Datasheet

³'011'$'´
Symbol
Period
25 50 75
Symbol
Period
25 50 75
Symbol
Period
25 50 75
Symbol
Period
25 50 75
Symbol
Period
25 50 75
Symbol
Period
25 50 75
Symbol
Period
25 50 75
pri_tx
pri_rx
pri_tx_en_n
driven by Slave
driven by Master
Symbol
Period
25 50 75
pri_tx_en_n
pri_tx
25 50 75
Symbol Period
25 50 75 25 50 75
pri_tx_en_n
driven by Slave
pri_rx
pri_tx
Symbol Period Symbol Period
DAC161P997
www.ti.com
SNAS515E JULY 2011REVISED OCTOBER 2013
Table 1. Symbol Set Table (continued)
Character Mnemonic SWIF Symbol Comments
Occupies two symbol periods
Master stops driving the SWIF and
“listens” for acknowledge pulse from the
Slave
Slave pulls ACKB LOW to reverse the
direction of data flow through the
“A”
transformer
Slave's DBACK will drive the SWIF
pri_rx line between 50% points of the
adjacent periods - in this interval Master
must de-assert pri_tx_en_n
Terminates with pri_tx = LOW and
pri_tx_en_n = LOW
Occupies one symbol period, but can be
repeated indefinitely
Transmit from Master only
Always LOW
“L”
Does not carry any meaningful
information
Used as an inter-frame symbol, i.e.,
sent by the Master between valid data
frames
Figure 20. Symbol stream example
Interface Circuit
SWIF interface components are shown in Figure 21. The buffers A and B comprise a square waveform recovery
circuit in applications where a pulse transformer is used to cross the galvanic isolation boundary, see
Transformer Coupled Interface - Data Flow to the DAC. The ACKB output and its internal NMOS switch provide
the means of reversing the direction of data flow through the coupling transformer see Transformer Coupled
Interface - Acknowledge Pulse. In simple cases where the data link is DC coupled buffer A alone acts as a data
receiver. The buffer C is provided for cases where improved noise immunity is required, see DC-Coupled
Interface.
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