Datasheet

Drift calculation:
Max Min
Temp Range
-
(ppm/ C)°
1 2 3
4 5
6
CLK
Internal POR
AVDD-AVSS
DVDD
First TDATA Sample
3V
1V
TDATA
DAC1280
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SBAS432A APRIL 2010REVISED SEPTEMBER 2010
Table 3. DAC1280 Power Consumption
Power Supplies
GAIN DAC1280 POWER (mW)
The DAC1280 has two power supplies, analog and
1/1 18
digital. The analog supply is 5V and can be
configured for bipolar operation (with AVDD = 2.5V
1/2 9.6
and AVSS = –2.5V), or configured for unipolar
1/4 5.3
operation (with AVDD = 5V and AVSS grounded).
1/8 3.1
The common-mode voltage of the external I/V
1/16 2.1
converter is normally set to the DAC1280 midsupply.
1/32 1.5
Because AVSS is shared with the reference low
1/64 1.2
terminal, and the analog supply pins draw
signal-dependent current, the external reference
ground terminal should connect to AVSS using a star
Offset and Gain Error
connection close to the DAC. This approach helps to
The DAC1280 features low offset error 50ppmFS,
minimize power-supply coupling to the reference
typical) and low gain error 0.02%, gain = 1/1,
input.
typical). Gain match is specified as the maximum
DVDD is the digital supply and operates over the
error of gain = 1/1 relative to gains 1/2 to 1/64 of a
range of 1.65V to 3.6V. Bypass the DVDD as well as
single device. Typical gain match error is ±0.1%.
the analog supplies with a capacitor (minimum 1mF).
Offset and gain drift are also very low for the
The power supplies can be sequenced in any order.
DAC1280. Drift is calculated using the box calculation
At power-on, the latter occurrence of DVDD
method:
exceeding 1V, or (AVDD AVSS) exceeding 3V,
causes an internal power-on reset (POR) to occur. A
(2)
POR resets the output to zero. After reset, the first
sampling of TDATA by the DAC1280 occurs on the
Where Max and Min are respectively the maximum
sixth CLK rising edge, as Figure 30 shows.
and minimum offset or gain errors (in ppm) recorded
over the specified temperature range of 40°C to
+85°C.
Noise Performance (SNR)
The DAC1280 achieves excellent signal-to-noise ratio
(SNR) performance. The SNR figures were obtained
using the circuit of Figure 35. SNR is measured by
the ADS1282 over a bandwidth of 0 to 413Hz (with
1ms sampling). The ADC and DAC have
Figure 30. Power-On Sequence
complementing gains for each measurement.
SNR is measured with a signal output of –0.5dBFS
and 31.25Hz, then taking the Fast Fourier
Power Consumption
Transformation (FFT) of the ADC data, and
The total power consumption is the power consumed
calculating the noise power over the specified
by the DAC1280 plus that of the external
bandwidth. The dc, fundamental, and harmonic bins
current-to-voltage converter. The power consumption
are removed for the SNR calculations. Measured this
of the DAC1280, in turn, depends on the gain setting.
way, SNR is the combination of the individual noise
Table 3 summarizes the DAC1280 power
sources including ADC noise, DAC1280 noise,
consumption.
voltage and current noise of the external op amp, and
thermal noise of the I/V resistors.
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