Datasheet
Tap Control
Current Taps
Common-Mode
Current
DAC1280
IOUTP
IOUTN
GAIN0
GAIN1
GAIN2
PWDN
VREF
RREF
SYNC
AVSS
TDATA
CLK
DGND
DVDD
AVDD
Reference
Current
Control
D
D
POR
Reset
Reset
Reset
4-bit
Counter
CLK/16
Divider
DAC1280
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SBAS432A –APRIL 2010–REVISED SEPTEMBER 2010
DAC1280 OVERVIEW
The DAC1280 is a high-accuracy digital-to-analog The current-steering stage switches the tap current to
converter (DAC) that provides outstanding THD either output, IOUTP or IOUTN, as a result of the
performance together with low noise. The DAC1280 sampling of TDATA. A higher 1s density directs more
is suitable for the demanding requirements of energy current toward IOUTP and less to IOUTN.
exploration and precision instrumentation where a Conversely, a higher density of 0s directs more
low-distortion test signal is needed. current to IOUTN than to IOUTP. Steering of the
output current yields an average output proportional
Figure 26 shows the DAC1280 block diagram. The
to the 1s density input.
DAC provides a signal output proportional to a 1s
density input. The DAC design is a multi-tap, An integrated power-on-reset (POR) function resets
current-steering filter that provides a differential the current taps, resulting in a zero differential output
current output. An external current-to-voltage (I-V) signal at power-up. The active low PWDN input
converter is required to provide a voltage output. V
REF
powers down the device to a low-power (mW) state.
and R
REF
program the full-scale current, and The SYNC input synchronizes the DAC1280 TDATA
GAIN[2:0] pins set the output range. sampling.
V
REF
and R
REF
establish an internal current that is
mirrored to a multi-tap, current-steering filter stage
through a reference current control block. The output
of the control block is set by the GAIN[2:0] inputs,
which fix the weighted tap currents in one of seven
ranges. The magnitude of the tap currents results in
the maximum differential output current ranges of
1250mA to the lowest range of 19.5mA.
Figure 26. DAC1280 Block Diagram
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